Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a formation method thereof. The formation method of the semiconductor structure comprises the steps of providing a substrate which comprises a first threshold voltage region and a second threshold voltage region, forming a first fin part and a second fin part in the first threshold voltage region to form a first NMOS (N-channel Metal Oxide Semiconductor) and a first PMOS (P-channel Metal Oxide Semiconductor), forming a third fin part and a fourth fin part in the second threshold voltage region to form a second NMOS and a second PMOS, forming dielectric layers provided with a first gate structure groove, a second gate structure groove, a third gate structure groove and a fourth gate structure groove in the first fin part, the second fin part, the third fin part and the fourth fin part, correspondingly forming a first gate dielectric layer, a second gate dielectric layer, a third gate dielectric layer and a fourth gate dielectric layer at the bottoms of the first gate structure groove, the second gate structure groove, the third gate structure groove and the fourth gate structure groove respectively, forming a first film layer, a second film layer, a third film layer and a fourth film layer on the first gate dielectric layer, the second gate dielectric layer, the third gate dielectric layer and the fourth gate dielectric layer respectively, performing ion implantation on the first film layer, or performing first ion implantation on the fourth film layer, or performing second ion implantation on the third film layer, or performing second ion implantation on the second film layer, and then correspondingly forming respective work function layers on the film layers. With the adoption of the method, the performance of the semiconductor structure can be improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the continuous advancement of integrated circuits, that is, IC technology, the number of components integrated on the same chip has evolved from the initial tens of hundreds to the present millions. The performance and complexity of current ICs are far beyond what could have been imagined at the beginning. In order to meet the requirements of complexity and circuit density (that is, the number of devices integrated into a certain area), the minimum feature size, which is known as the "geometric line width" of the device, will become smaller and smaller with the innovation of process technology . [0003] As the feature size of transistors continues to shrink, the demand for smaller transistors is increasing, so fin field effect transistors are developed in transistor technology....

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Problems solved by technology

[0005] The problem solved by the present invention is: the performance of the semiconductor structure formed by the method of the prior art is not good

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