Touch array substrate
A touch array and substrate technology, applied in optics, instruments, electrical digital data processing, etc., can solve the problems of metal wiring resistance, increased power consumption, insufficient charging of pixels, etc., to reduce parasitic capacitance and RC delay , Improve the effect of display quality
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Embodiment 1
[0035] This embodiment improves the existing touch array substrate. like Figure 5 It is a schematic cross-sectional structure diagram of the touch array substrate of this embodiment, the second indium tin oxide layer 2 is located on the top layer of the touch array substrate, and the PV layer 8, IL layer 9, first indium tin oxide layer 1, and PLN are sequentially downward. layer 10 , ILD layer 11 , GI layer 12 , buffer layer 13 , and glass substrate 14 . A light-shielding layer (LS layer) 17 is embedded inside the buffer layer 13 , and the LS layer 17 is adjacent to the glass substrate 14 . The GI layer 12 is embedded with polyethylene, and there are a pair of positive and negative electrodes of N-type semiconductor material on both sides of the polyethylene, and the positive electrodes on each side are connected to the source and drain, and the source and drain pass through the ILD layer 11 and extends to PLN layer 10. A GE is provided between two drains in the ILD layer ...
Embodiment 2
[0039] like Figure 5 It is a schematic cross-sectional structure diagram of the touch array substrate of this embodiment, the second indium tin oxide layer 2 is located on the top layer of the touch array substrate, and the PV layer 8, IL layer 9, first indium tin oxide layer 1, and PLN are sequentially downward. layer 10 , ILD layer 11 , GI layer 12 , buffer layer 13 , and glass substrate 14 . A light-shielding layer (LS layer) 17 is embedded inside the buffer layer 13 , and the LS layer 17 is adjacent to the glass substrate 14 . The GI layer 12 is embedded with polyethylene, and there are a pair of positive and negative electrodes of N-type semiconductor material on both sides of the polyethylene, and the positive electrodes on each side are connected to the source and drain, and the source and drain pass through the ILD layer 11 and extends to PLN layer 10. A GE is provided between two drains in the ILD layer 11 . One of the drain electrodes is connected to the second i...
Embodiment 3
[0042] like Figure 5 It is a schematic cross-sectional structure diagram of the touch array substrate of this embodiment, the second indium tin oxide layer 2 is located on the top layer of the touch array substrate, and the PV layer 8, IL layer 9, first indium tin oxide layer 1, and PLN are sequentially downward. layer 10 , ILD layer 11 , GI layer 12 , buffer layer 13 , and glass substrate 14 . A light-shielding layer (LS layer) 17 is embedded inside the buffer layer 13 , and the LS layer 17 is adjacent to the glass substrate 14 . The GI layer 12 is embedded with polyethylene, and there are a pair of positive and negative electrodes of N-type semiconductor material on both sides of the polyethylene, and the positive electrodes on each side are connected to the source and drain, and the source and drain pass through the ILD layer 11 and extends to PLN layer 10. A GE is provided between two drains in the ILD layer 11 . One of the drain electrodes is connected to the second i...
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