Equipment and method for realizing parallel convolution calculation based on resistive random access memory array

Abstract

The invention discloses equipment and method for realizing parallel convolution calculation based on a resistive random access memory array. The equipment comprises a resistive random access memory array, a training module, an input module, a bit line control unit, a word line control unit, an output module, and a controller. In addition, the method includes: when convolution is calculated, a convolution kernel is written into each resistive unit by corresponding to an input position, wherein the conductive value of the resistive unit expresses the numerical value of the convolution kernel; the value of a level applied on a bit line expresses an input matrix; each output module expresses a convolution result; and output signals of different output modules express results of different input regions or different convolution kernels, so that parallel calculation of convolution is realized.

Description

technical field [0001] The present disclosure generally relates to the technical field of semiconductor integrated circuits and their manufacture, and more specifically, relates to a method of convoluting the input through the current summation function in the same row (same column) in the array of resistive switching devices. Computing devices and methods. Background technique [0002] Convolution operations have a wide range of applications in image processing, such as image denoising, feature extraction, smoothing, filtering, edge detection, image enhancement, etc. In particular, the convolution operation plays a key role in the convolutional neural network (CNN), and the convolution operation on the input image is the basis for realizing the specific functions of the convolutional neural network. As an artificial neural network algorithm that is widely used at present, due to the characteristics of parallelism, distributed computing, self-learning and self-adaptive capa...

AI Technical Summary

Problems solved by technology

Under the constraints of hardware consumption and power consumption, it is difficult for the traditional convolution implementation method to complete large-scale parallel convolution operations and calculate the convolution results of larger convolution kernels; in addition, the traditional software convolution method is based on Feng Neumann architecture, in which the computing part and the storage part are separated, so a large number of storage devices are required to store input information and a large number of different convolution kernel information

[0003] In the context of the current rapid development of big data and neural network algorithms, the traditional software-based convolution implementation methods have been difficult to meet people's growing needs in terms of computing speed, energy consumption, and chip area. It is urgent to develop a hardware-based The convolution implementation method of

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