Transistor and forming method thereof

Abstract

The invention relates to a transistor and a forming method thereof. The forming method of the transistor includes the following steps that: a semiconductor substrate including a first region, a second region, and a third region which are adjacent to one another is provided; well region ion implantation is performed, and a well region is formed in the semiconductor substrate; threshold voltage adjustment ion implantation is performed, so that g a first doped region can be formed at the surface of the well region in the second region; a gate structure is formed on the semiconductor substrate in the first region; shallow doping ion implantation is performed, so that a shallowly doped source region is formed in the semiconductor substrate at the second region at one side of the gate structure, and a shallowly doped drain region is formed in the semiconductor substrate at the third region at the other side of the gate structure; and a raised source region is formed on the shallowly doped source region, and a raised drain region is formed on the shallowly doped drain region. With the method of the present invention adopted, parasitic capacitance between the source region and a channel region, between the drain region and the channel region, between the source region and the substrate, as well as between the drain region and the substrate can be decreased.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a transistor. Background technique [0002] Metal-oxide-semiconductor (MOS) transistors are the most basic devices in semiconductor manufacturing. They are widely used in various integrated circuits. According to the main carrier and the type of doping during manufacturing, they are divided into NMOS and PMOS transistors. [0003] The prior art provides a method for manufacturing a MOS transistor. Please refer to Figure 1 to Figure 3 The schematic cross-sectional structure diagram of the formation process of the MOS transistor in the prior art is shown. [0004] Please refer to figure 1 , providing a semiconductor substrate 100, forming isolation structures 101 in the semiconductor substrate 100, the semiconductor substrate 100 between the isolation structures 101 is an active region, and forming a well region (not shown) in the active region; ...

AI Technical Summary

Problems solved by technology

[0009] However, the performance of transistors formed by existing techniques still needs to be improved

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