A chip thermal layout method

Abstract

The invention provides a chip thermal layout method based on the combination of particle swarm optimization and junction temperature, which includes: determining the number of chips to be laid out, the size of the chips, and the size of the substrate; using each chip as a particle, all chips on the substrate constitute Particle swarm uses the junction temperature of the chip as the fitness function and uses the particle swarm optimization algorithm to find the optimal chip coordinates; each chip is laid out on the substrate based on the determined optimal chip coordinates. The present invention takes advantage of the particle swarm optimization algorithm and can specify the junction temperature of any chip as the fitness function, taking into account the actual size of the chip to prevent the chip from going out of bounds or overlapping, so that all chips on the substrate are reasonably distributed, so that a certain The temperature of high-power chips, chips that are not resistant to high temperatures, or chips with special requirements should be kept as low as possible, thereby further reducing the hot spot temperature on the entire substrate, narrowing the temperature difference between chips, and improving the performance and reliability of the device.

Description

technical field [0001] The invention belongs to the technical field of chip thermal layout, in particular to a chip thermal layout method. Background technique [0002] The traditional thermal layout includes the thermal orientation method, the combination of the micro-element thermal balance method and the optimization method, and other layout methods. [0003] In the articles "Thermal Layout Optimization of Electronic Components on PCB Based on Particle Swarm Algorithm" and "Research on Thermal Layout Optimization of Electronic Components on PCB Based on Ant Colony Algorithm", both methods use the microelement volume thermal balance method to establish The temperature distribution model, however, the micro-element body heat balance method needs to derive various corresponding node equations separately. In the case of complex temperature field and convection, it cannot accurately express the steady-state temperature value corresponding to each chip, and the two This method...

AI Technical Summary

Problems solved by technology

In the articles "Thermal Placement Design for MCM Applications" and "Integration of simulation and response surfacemethods for thermal design of multichip modules", the genetic algorithm is used to optimize the layout of electronic components on the PCB, but this method requires more Storage space, because it must remember all the individual structures in the billion population, and there are problems of non-standard coding and inaccurate coding representation

In addition, the genetic algorithm has no effective quantitative analysis method for the accuracy, feasibility, and computational complexity of the algorithm.

[0007] In the article "Object-Oriented Thermal Placement Using an Accurate Heat Model", the simulated annealing algorithm is used. The optimization process of this algorithm is too long and takes a lot of time, and the solution to a specific problem requires more difficult parameter adjustments. , and it is not necessarily possible to find the global optimal solution

Also, as the article shows, the method does not include boundary setting conditions

[0008] In the article "Optimization of electronics component placement design on PCBusing self organizing genetic algorithm (SOGA)", although this method has better convergence effect, it also requires more processing time

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