The present invention provides a particle swarm optimization and junction temperature combination-based chip hot layout method. The method comprises the steps of determining a number and sizes of chips to be distributed, and a size of a baseboard; using each chip as a particle, wherein all chips on the baseboard form a particle swarm, using a junction temperature of the chip as a fitness function, and seeking optimal chip coordinates by using a particle swarm optimization algorithm; and distributing each chip on the baseboard according to the determined optimal coordinates of each chip. In the method, the junction temperature of any chip can be designated as the fitness function by taking the advantage of the particle swarm optimization algorithm, the actual size of the chip is taken into account so as to prevent the chip to be out of the bound and overlap, so that all chips on the baseboard are distributed reasonably, further, temperature of a certain high-power chip, a chip not resisting high temperature, or a chip with special requirements reaches a minimum level as much as possible, therefore, hot-spot temperature on the whole baseboard is further reduced, a temperature difference of chips is reduced, and the performance and reliability of the device are improved.