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Semiconductor device and mathod of fabricating the same

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of reduced reliability and service life of components, snapback breakdown, etc., to reduce hot carrier effects, The effect of reducing the snapback breakdown phenomenon

Active Publication Date: 2017-04-26
POWERCHIP SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In more severe cases, the drain saturation current (I dsat ) will even appear snapback (snapback), which will lead to the occurrence of snapback breakdown (snapback breakdown), which will reduce the reliability and service life of components

Method used

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  • Semiconductor device and mathod of fabricating the same
  • Semiconductor device and mathod of fabricating the same
  • Semiconductor device and mathod of fabricating the same

Examples

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experiment example

[0061] An experimental example of a semiconductor device manufactured by simulation according to an embodiment of the present invention. In this experimental example, the base of the semiconductor element includes a source region and a drain region, the distance between the source region and the drain region is 2.5 microns to 4 microns (ie, the second width L2), and the gate of the semiconductor element has Two gate doped regions and a gate undoped region, the gate undoped region is located between the two gate doped regions to separate it, and the width of the gate undoped region is 0.2 microns (ie first width L1).

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PUM

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Abstract

The present invention discloses a semiconductor device and a method for manufacturing the same. The method comprises the steps that a substrate is provided; a gate dielectric layer is formed to cover a portion of the substrate; the grid electrode is located on the gate dielectric layer; a first doping process is performed for a portion of the grid electrode to form a plurality of grid doped regions and at least one grid undoped region at the grid electrode, at least one grid undoped region being located between the grid doped regions and the width of at least one of the grid undoped regions is a first width; a dielectric layer is formed to cover the top and side walls of the grid electrode; a second doping process is performed on the substrate to form a source region and a drain region, wherein the shortest distance between the source region and the drain region is the second width.

Description

technical field [0001] The present invention relates to a semiconductor element and its manufacturing method, and in particular to a high-voltage semiconductor element and its manufacturing method. Background technique [0002] With the integration of semiconductor devices, in order to achieve the goal of high density and high performance, when manufacturing semiconductor devices, it tends to manufacture smaller and more highly integrated structures. However, as the device size shrinks, the problem of hot carrier effect still exists. In more severe cases, the drain saturation current (I dsat ) will even appear snapback (snapback), which will lead to the occurrence of snapback breakdown (snapback breakdown), which will reduce the reliability and service life of components. Such problems are more serious in high voltage devices. Therefore, how to reduce the snapback breakdown caused by the hot carrier effect is a subject of current research. Contents of the invention [...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/772H01L21/335
CPCH01L29/66409H01L29/772
Inventor 彭康钧车行远李芃葳
Owner POWERCHIP SEMICON MFG CORP