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Low power consumption low differential voltage linear voltage regulator system

A low dropout linear, voltage stabilizer technology, applied in control/regulating systems, instruments, regulating electrical variables, etc., can solve problems such as false triggering, reduce spikes, and improve transient response performance.

Active Publication Date: 2017-05-24
上海迦美信芯通讯技术有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If when V REF When the voltage value of the power supply VDD is not a stable voltage value when it is powered on, it will exist. At the beginning, the detection voltage point A is higher than V REF voltage, which leads to a false trigger

Method used

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  • Low power consumption low differential voltage linear voltage regulator system
  • Low power consumption low differential voltage linear voltage regulator system
  • Low power consumption low differential voltage linear voltage regulator system

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Embodiment Construction

[0033] The present invention will be further elaborated below by describing a preferred specific embodiment in detail in conjunction with the accompanying drawings.

[0034] A low power low dropout linear regulator system such as image 3 As shown, it includes: low-power reference circuit 100 (using conventional low-power reference circuit design, static power consumption IQ=2.8uA, not described as the key part of this patent); undervoltage lockout circuit 200 (UVLO), and The low power consumption reference circuit 100 is connected; the low dropout linear regulator circuit 300 (LDO) is connected with the low power consumption reference circuit 100 and the undervoltage lockout circuit 200 respectively; wherein, the low power consumption The reference circuit 100 outputs the reference voltage signal V to the undervoltage lockout circuit 200 REF ; The low power consumption reference circuit 100 outputs a bias current signal VBIAS and a reference voltage signal V to the low dropo...

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Abstract

The invention discloses a low power consumptionlow differential voltage linear voltage regulator system. The system comprises alow power consumption benchmark circuit, an under-voltage locking circuit connected with the low power consumption benchmark circuit, a low differential voltage linear voltage regulator circuit connected with the low power consumption benchmark circuit and the under-voltage locking circuit respectively, wherein the low power consumption benchmark circuit outputs benchmark voltage signals to the under-voltage locking circuit, the low power consumption benchmark circuit outputs bias current signals and benchmark voltage signals to the low differential voltage linear voltage regulator circuit. The low power consumption low differential voltage linear voltage regulator system can substantially enhance the transient response performance of the LDO circuit.

Description

technical field [0001] The invention relates to the technical field of power supply management, in particular to a low-power consumption and low-dropout linear regulator system, which is applied in a navigation system and has an undervoltage protection function. Background technique [0002] Low Dropout Regulator (LDO) is widely used in portable electronic products due to its advantages of simple structure, low power consumption, low output noise, small chip area occupied and low price. Compared with the DC-DC converter of DC to DC, LDO has the advantages of low ripple and low output noise, which makes LDO have incomparable advantages in some occasions with strict requirements on output voltage accuracy and stability, and the market development The prospects are very bright. [0003] LDO circuits in the prior art such as figure 1 shown by the reference voltage V R , operational amplifier A, MOS drive tube Q, series voltage divider resistor (R 1 , R 2 ) form, the referen...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
CPCG05F1/561
Inventor 田磊管剑铃谢婷婷倪文海徐文华
Owner 上海迦美信芯通讯技术有限公司
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