Method for reducing effect of base plane dislocation on silicon carbide epitaxial layer

Abstract

The invention discloses a method for reducing an effect of base plane dislocation on a silicon carbide epitaxial layer. The method comprises the steps of: carrying out interface high-temperature annealing processing on a silicon carbide substrate to promote a BPD-TED inversion point to move downward and away from a heavily-doped buffer layer surface; adding a gradient buffer layer to reduce a concentration difference between a heavily-doped buffer layer and the epitaxial layer, repairing a heavily-doped buffer layer interface etched by a high-temperature hydrogen gas; and performing surface etch pit repairing on the heavily-doped buffer layer by utilizing the feature of lateral epitaxial growth enhancement in a low-speed epitaxial mode, and improving surface quality of the subsequent epitaxial layer. The method can reduce the base plane dislocation inversion point below the heavily-doped buffer layer interface, effectively decreases the probability of deriving a stacking fault defect by base plane dislocation under the action of a high current in the epitaxial layer, and adopts the process compatible with the conventional epitaxial process.

Description

technical field [0001] The invention relates to a method for growing a silicon carbide epitaxial layer with high surface quality, in particular to a method for reducing the influence of basal plane dislocations on the silicon carbide epitaxial layer. Background technique [0002] Now the perfection of commercial silicon carbide substrate crystals has been greatly improved, but there are still a large number of basal plane dislocations (BPD) in the silicon carbide substrate, and the BPD may extend to the epitaxial layer, and under the action of the forward conduction current It evolves into a stacking fault (SF), which causes the forward voltage drift of the high-frequency diode device. Since edge dislocations (TED) have much less impact on device performance, increasing the ratio of BPD to TED during the epitaxial growth of silicon carbide and preventing BPD in the substrate from extending into the epitaxial layer are very important for improving device performance. importa...

AI Technical Summary

Problems solved by technology

However, during the high-temperature annealing process, due to the high temperature, the etching rate of hydrogen gas on silicon carbide is fast, and the surface of the buffer layer is easily damaged, resulting in the surface degradation of the epitaxial material that is subsequently grown. Therefore, this principle has not been applied to the epitaxial process.

Images