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Shortest-distance-based spacing test results classifying method for use in integrated circuit layout and flat panel display layout

A technology with the shortest distance and inspection results, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of delaying the layout design process, manual classification and inspection results, and low work efficiency, to speed up manual classification and screening, The effect of assisting efficient classification and improving image inspection efficiency

Inactive Publication Date: 2017-05-31
北京华大九天科技股份有限公司
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Problems solved by technology

[0008] The present invention aims at the field of automation of semiconductor integrated circuit design. After the distance check is performed between the layout of the integrated circuit and the layout of the flat panel display, the work efficiency of manual classification check results is low, which delays the actual problem of the entire layout design process. Classification method of spacing inspection results based on the shortest distance in flat panel display layout

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  • Shortest-distance-based spacing test results classifying method for use in integrated circuit layout and flat panel display layout
  • Shortest-distance-based spacing test results classifying method for use in integrated circuit layout and flat panel display layout
  • Shortest-distance-based spacing test results classifying method for use in integrated circuit layout and flat panel display layout

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Embodiment Construction

[0025] This section details the preferred way of carrying out the invention.

[0026] The preferred way to realize the invention corresponds to the main technical solution, including the following three aspects:

[0027] First, the distance check results before merging and the calculation of the shortest distance.

[0028] refer to figure 1 , Figures (11) (12) (13) represent a part of the circuit layout and the spacing check results before merging, and the right figure (14) (15) (16) (17) defines the spacing checking rules:

[0029] As shown in (14), the black geometric figure is an input layer L1 for spacing check;

[0030] As shown in (15), the white geometry is another input layer L2 for spacing check;

[0031] As shown in (16), S is the distance check size, when the distance between the L1 layer graphics and the L2 layer graphics is less than or equal to S, the result is output;

[0032] As shown in (17), the shadow geometry is the output result layer of the spacing ch...

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Abstract

A shortest-distance-based spacing test results classifying method for use in integrated circuit layout and flat panel display layout belongs to the field of automation of semiconductor integrated circuit design and mainly relates to how to rank spacing test results according to severities of violations of spacing rule in order to improve manual classifying efficiency. Reference is made to integrated circuit layout to carry out spacing test on flat panel display layout, and the two layouts share similar problems, to be specific, not all violation results require layout modification; presently, all the results are divided into one type requiring layout modification and the other type not requiring layout modification mainly based on manual judgment. In fact, the most important index affecting manual classification is a shortest distance in spacing test results. The shortest distance is calculated during spacing testing and is attached to spacing test results, the results are back-annotated to an original layout to assist in manual classification; in addition, the results are ranked from small to great according to the shortest distance, ranking according to severities of violations is realized approximately, and manual picture test efficiency is improved significantly.

Description

technical field [0001] The invention relates to a method for classifying spacing inspection results based on the shortest distance in an integrated circuit layout and a flat panel display layout, which belongs to the field of semiconductor integrated circuit design automation, and mainly involves how to sort the spacing inspection results according to the severity of violation of spacing rules and improve the efficiency of manual classification. Background technique [0002] Dimensional Check (Dimensional Check) is an important part of electronic design automation. It originates from the integrated circuit layout (Integrated Circuit, IC) design process. It usually checks items such as wire width (Width) and wire spacing (Space), and outputs the results is a design that violates the spacing rules. The spacing inspection of the Flat Panel Display (FPD) layout is based on the layout of the integrated circuit. [0003] The two have similar problems, that is, not all illegal res...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/398
Inventor 马海南于士涛范永兴路艳芳杨晓东
Owner 北京华大九天科技股份有限公司
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