Display substrate and preparation method thereof

Abstract

The invention discloses a display substrate and a preparation method thereof. The method comprises steps as follows: a TFT (thin film transistor) is formed above a substrate and located in a non-pixel area; a passivation layer is formed above the TFT; a color resistor is formed above the passivation layer and located in a colored pixel area; a planarization layer is formed above the passivation layer and the color resistor; the thickness of the planarization layer in the colored pixel area is reduced; a display electrode is formed above the planarization layer and is connected with a via hole right above a drain electrode in the TFT. According to the technical scheme, through thinning treatment of the planarization layer located in the colored pixel area, the thickness of a film of the planarization layer located above the color resistor is reduced, and the flatness of the planarization layer can be effectively improved. Besides, the thickness of the film of the planarization layer located above the color resistor is reduced, so that the height difference between the display electrode and the drain electrode is reduced, and the risk that the display electrode breaks can be effectively reduced.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a display substrate and a preparation method thereof. Background technique [0002] COA (Color Filter On Array) is a technology that directly prepares color photoresist (Color Filter) on the array substrate. Its advantages are that it can increase the aperture ratio and improve the contrast of the product, and there is no difference between the color filter substrate and the array substrate. The alignment problem also reduces the difficulty of making the liquid crystal cell. [0003] figure 1 It is a structural schematic diagram of an existing COA display substrate, such as figure 1 As shown, it includes: a base substrate 1, a thin film transistor 2 (Thin Film Transistor, TFT for short) formed above the base substrate 1, a passivation layer 4 covering the thin film transistor 2 and the base substrate 1, and a passivation layer located on the passivation layer 4. The upper col...

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Problems solved by technology

[0004] Depend on figure 1 It can be seen that due to the color resistance 12 / 13 / 14 in the pixel area 10, the height of the part of the planarization layer 5 located in the pixel area 10 is significantly higher than the height of the part located in the non-pixel area 9, and the planarization effect is not good. Affect the preparation of other subsequent structures; in addition, when preparing the display electrode 7, due to the thick film thickness of the planarization layer 5 above the color resistance 12 / 13 / 14, there is a large gap between the display electrode 7 and the drain. The height difference H (the height difference is approximately equal to the difference between the thickness of the passivation layer, the thickness of the color resist film, the thickness of the planarization layer above the color resist and the thickness of the drain electrode), when the display electrode 7 When the via hole is connected to the drain, the part of the display electrode 7 located in the via hole is prone to breakage, resulting in poor connection between the display electrode 7 and the drain

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