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A method for increasing the via slope angle of the via layer

A technology of slope angle and via hole, which is applied in the direction of electrical components, circuits, semiconductor/solid-state device manufacturing, etc., to achieve the effects of reducing key dimension distortion, improving circuit quality, and good lapping effect

Active Publication Date: 2019-05-07
TRULY HUIZHOU SMART DISPLAY
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  • Application Information

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Problems solved by technology

[0003] The invention provides a method for increasing the via hole slope angle of the via layer, which solves the problem of increasing the vacuum drying time in the photolithography step to generate a photoresist whose hardness in the upper layer is greater than that of the lower layer, and after exposure and development, it forms an upper wide middle layer. The technical problem of forming a via hole with a slope angle of 60° to 90° through the etching step of the photoresist via hole with a narrow bottom width

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  • A method for increasing the via slope angle of the via layer
  • A method for increasing the via slope angle of the via layer
  • A method for increasing the via slope angle of the via layer

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Embodiment Construction

[0020] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. The values ​​of the following components are only preferred embodiments, and do not constitute limitations on the scope of protection of the present invention.

[0021] see figure 1 , is a fabrication flowchart of a method for increasing the via hole slope angle of the via layer provided by an embodiment of the present invention. In this embodiment, the method for increasing the via hole slope angle of the via layer includes a photolithography step and an etching step, and the photolithography step includes a photoresist coating step and a vacuum drying (VCD) step , soft baking (SHP) step, exposure and development step; In the photoresist coating step, the photoresist 10 is coated on the film layer 20, as figure 2 , is a schematic structural view of the via layer (the substra...

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Abstract

The invention provides a method increasing a through hole slope angle of a through hole layer; the method comprises a lithography step and an etching step; the lithography step comprises the following steps: photoresist gluing, vacuum drying, soft baking and exposure developing; the photoresist gluing step can glue the photoresist on a film; the vacuum drying step can prolong the vacuum-pumping time by 20% to 50%; the photoresist upper hardness is bigger than the lower hardness; in the exposure developing step, the photoresist is exposed and developed so as to form a photoresist through hole with a wide upper side, a narrow middle and a wide lower side; the photoresist forms an extruding middle portion; in the etching step, the photoresist extruding portion is firstly ashed, the whole film surface below the photoresist through hole is ashed in an approximately consistent speed, thus forming a through hole layer through hole with the slope angle between 60-90 degrees. The embodiment provides the method increasing the through hole slope angle of the through hole layer, thus forming the through hole layer through hole with the slope angle between 60-90 degrees, reducing the through hole layer key dimension distortions, and providing the better circuit overlapping effect.

Description

technical field [0001] The invention relates to the technical field of display panels, in particular to a method for increasing the slope angle of via holes in a via hole layer. Background technique [0002] In the display panel industry, the circuit design is generally a superposition of 4 to 12 layers of patterns, and in the semiconductor industry, the number of layers is as many as dozens. In these multi-layer circuit designs, the via layer is an essential layer, which plays the role of connecting the circuit and connecting the previous and the next. For the via layer, the slope angle of the via hole is particularly important. If the slope angle is small, the critical dimension loss of the via layer will be large. When the slope angle of the via hole is 90°, the critical dimension loss of the via layer will be the smallest. However, at present, the maximum slope angle produced by traditional technology is about 60°, and there is still a large loss of critical dimensions....

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/027
CPCH01L21/027
Inventor 杨永光曾艳新王浩刘伟任思雨苏君海黄亚清李建华
Owner TRULY HUIZHOU SMART DISPLAY
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