Method for improving on-chip resistivity uniformity of epitaxial wafer

A technology of on-chip resistance and uniformity, which is applied in the manufacture of circuits, electrical components, semiconductors/solid-state devices, etc. It can solve the problems of different self-doping between furnaces, inconsistent curve profiles, and poor uniformity of epitaxial resistivity sheets.

Inactive Publication Date: 2017-06-20
HEBEI POSHING ELECTRONICS TECH
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Problems solved by technology

[0002] In the case of high-temperature epitaxy on heavily arsenic-doped substrates, As high-temperature volatilization leads to poor uniformity of epitaxial resistivity in the wafer; at the same time, substrates with different As concentrations have inconsistent high-temperature volatilization of As, resulting in different self-doping between furnaces, which in turn leads to poor uniformity of epitaxial resistivity. Epitaxial layer resistivity fluctuates greatly
The high-temperature volatilization and self-doping of As heavily doped subst

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  • Method for improving on-chip resistivity uniformity of epitaxial wafer

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Embodiment Construction

[0026] The technical solutions in the embodiments of the present invention are clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0027] In the following description, a lot of specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways different from those described here, and those skilled in the art can do it without departing from the meaning of the present invention. By analogy, the present invention is therefore not limited to the specific examples disclosed below.

[0028] Overall, such as...

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Abstract

The invention discloses a method for improving on-chip resistivity uniformity of an epitaxial wafer, and relates to the technical field of a fabrication method for a silicon substrate epitaxial layer. The method comprises the following steps of corroding an epitaxial furnace base under a high temperature by a high-purity hydrogen chloride gas; loading a silicon substrate sheet into a pit of the epitaxial furnace base, and blowing an epitaxial furnace cavity by high-purity hydrogen during the temperature rising process of an epitaxial furnace until a set temperature is reached; performing heat preservation for over 5 minutes; performing large-flow and variable-flow blowing when the temperature of the epitaxial furnace is risen to the set temperature, wherein the gas flow is set 100-(-400)L/min, and the time is more than 4 minutes; and reducing the temperature of the epitaxial furnace to an epitaxial growth temperature, and performing epitaxial growth of the silicon substrate sheet. By the method, the on-chip resistivity of the epitaxial wafer can be more uniform, the finished rate is greatly improved, and the profile consistency of SRP curve is greatly improved.

Description

technical field [0001] The invention relates to the technical field of a method for manufacturing an epitaxial layer of a silicon substrate, in particular to a method for improving the uniformity of resistivity in an epitaxial wafer. Background technique [0002] In the case of high-temperature epitaxy on heavily arsenic-doped substrates, As high-temperature volatilization leads to poor uniformity of epitaxial resistivity in the wafer; at the same time, substrates with different As concentrations have inconsistent high-temperature volatilization of As, resulting in different self-doping between furnaces, which in turn leads to poor uniformity of epitaxial resistivity. The resistivity of the epitaxial layer fluctuates greatly. The high-temperature volatilization and self-doping of As heavily doped substrate gradually decreases with the epitaxial growth time, resulting in the longitudinal curve profile of the epitaxial layer being a curve, and different self-doping conditions,...

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Application Information

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IPC IPC(8): H01L21/02
CPCH01L21/02005H01L21/0201H01L21/02617H01L21/02658
Inventor 贾松张绪刚陈秉克赵丽霞袁肇耿薛宏伟侯志义张志勤吴会旺周晓龙
Owner HEBEI POSHING ELECTRONICS TECH
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