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Thin film transistor array panel

A technology of thin film transistors and array substrates, applied in the field of thin film transistor array substrates, can solve problems affecting device performance, poor structure, etc., and achieve good electrical effects

Active Publication Date: 2017-07-21
HONG FU JIN PRECISION IND (SHENZHEN) CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Generally speaking, the source and drain of TFT are formed by etching. During the etching process, it is easy to form some bad structures, which will affect the performance of the device.

Method used

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Examples

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Embodiment Construction

[0025] figure 1 It is a schematic layout diagram of a thin film transistor array substrate in a preferred embodiment of the present invention. figure 1 A TFT array substrate is disclosed, which includes a plurality of pixel units 10 arranged to form a matrix with multiple rows and multiple columns. Each pixel unit 10 includes at least one TFT element 100 and at least one pixel electrode 120 . The TFT element 100 is a transistor with low field effect and is composed of a semiconductor thin film, a conductive thin film and a dielectric layer. The thin films of different materials are usually arranged on a supporting structure (such as an insulating substrate 101 ). Each TFT element 100 includes a gate 102 and a pair of mutually switchable source 1051 and drain 1052 . The pixel electrodes 120 are used in the display to drive liquid crystals (not shown). The pixel electrode 120 is connected to the source 1051 or the drain 1052 of the TFT element 100 . The TFT element 100 acts ...

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Abstract

The invention provides a thin film transistor array panel, a second conductive layer thereof is of a multi-layered structure, the second conductive layer of the multi-layered structure is formed to be a source electrode and a drain electrode arranged at an interval, the second conductive layer at least contains a first sub-layer located over a channel layer and electrically connected with the channel layer, a second sub-layer located over the first sub-layer and a third sub-layer located over the second sub-layer, the first sub-layer and the third sub-layer contain metallic oxide materials containing indium and zinc, an indium to zinc atomatic ratio in the first sub-layer is larger than that in the third sub-layer, a groove located between the soruce electrode and the drain electrode is formed in the second conductive layer, and difference between the indium to zinc atomatic ratios of the first sub-layer and the third sub-layer affects the formation of the profile of the groove in an etching process, causing the width of the groove in the third sub-layer to be larger than that of the groove in the first sub-layer.

Description

technical field [0001] The invention relates to a semiconductor technology, in particular to a thin film transistor (TFT) array substrate. Background technique [0002] The flat panel display device has many advantages such as thin body, power saving, and no radiation, and has been widely used. Existing flat panel display devices mainly include Liquid Crystal Display (LCD) and Organic Electroluminescence Device (OELD), also known as Organic Light Emitting Diode (OLED). In flat panel display devices, thin film transistors (TFTs) are often used as switching elements for pixel electrodes. Generally speaking, the source and drain of the TFT are formed by etching. During the etching process, some undesired structures are easily formed, which affects the performance of the device. Contents of the invention [0003] In view of this, the present invention provides a TFT array substrate with improved performance. [0004] The thin film transistor array substrate includes a plura...

Claims

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Application Information

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IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/124H01L27/1259H01L29/41733H01L29/45H01L29/458H01L29/66765H01L29/66969H01L29/78669H01L29/78678H01L29/7869H01L21/441H01L21/443H01L21/47635H01L21/477H01L27/1218H01L27/1225H01L29/24H01L29/78618
Inventor 高逸群林欣桦施博理张炜炽陆一民吴逸蔚
Owner HONG FU JIN PRECISION IND (SHENZHEN) CO LTD
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