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ESD board structure and electrostatic protection circuit

A technology of layout structure and electrostatic protection, applied in circuits, electrical components, electrical solid devices, etc., can solve problems such as failure and physical damage of integrated circuits, and achieve the effects of increasing manufacturing costs, wide application, and reducing trigger voltage.

Inactive Publication Date: 2017-07-28
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Such a large current passes through the integrated circuit in a short period of time, and the power consumption generated will seriously exceed the maximum value it can withstand, which will cause serious physical damage to the integrated circuit and eventually fail

Method used

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  • ESD board structure and electrostatic protection circuit
  • ESD board structure and electrostatic protection circuit
  • ESD board structure and electrostatic protection circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] In order to solve the problems existing in the prior art, the present invention provides an ESD layout structure, and the method of the present invention will be further described below in conjunction with the accompanying drawings, wherein, Figure 2a is the layout structure of the ESD structure described in the present invention; Figure 2b It is a schematic diagram of the circuit structure of the ESD structure described in the present invention.

[0037] In the existing ESD protection device, the structure of GGNMOS is as follows Figure 1a As shown, it includes gate 103, source, drain 101, and contact hole 102, but its trigger voltage is high and its performance is low. As an improvement, the GRNMOS structure is a relatively common protection scheme, such as Figure 1b As shown, it includes a gate 103, a source, a drain 101, a contact hole 102, and a resistor 104 connected to the gate. Its trigger voltage is lower than that of GRNMOS, but it needs to increase the e...

Embodiment 2

[0060] The present invention also provides an electrostatic protection circuit, such as Figure 2b As shown, it includes an input terminal, a ground terminal and a GGNMOS located on a semiconductor substrate, the substrate and the source of the GGNMOS are connected to the ground terminal, and the drain of the GGNMOS is connected to the input terminal;

[0061] The protection circuit further includes a diode, the cathode of the diode is connected to the gate of the GGNMOS, and the anode of the diode is connected to the ground terminal.

[0062] Optionally, the input end includes a pad, and the pad is connected to a protection circuit.

[0063] Optionally, the pad is made of metal material.

[0064] The advantages of the invention are: it has wide application in electrostatic protection; it can reduce the trigger voltage; and it does not increase the manufacturing cost.

Embodiment 3

[0066] The present invention also provides a semiconductor device, including the layout structure described in the first embodiment. The present invention also provides an electronic device, including the above-mentioned semiconductor device.

[0067] The electronic device of this embodiment can be any electronic product or equipment such as mobile phone, tablet computer, notebook computer, netbook, game console, TV set, VCD, DVD, navigator, camera, video recorder, voice recorder, MP3, MP4, PSP, etc. , can also be any intermediate product including the semiconductor device. The electronic device according to the embodiment of the present invention has better performance due to the use of the above-mentioned semiconductor device.

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PUM

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Abstract

The invention provides an ESD board structure and an electrostatic protection circuit. The ESD board structure comprises a semiconductor substrate; a plurality of gate structures which are arranged on the semiconductor substrate, wherein the first end of the gate structure has a first-type doped part, and the second end of the gate structure has a second-type doped part; a plurality of source electrodes and a plurality of drain electrodes in the semiconductor substrate at two sides of the gate structure and have the first-type doped parts, wherein the second end of each of the semiconductor substrate, the source electrodes and the gate electrode structures is connected with a grounding end. The drain electrodes are connected with an input end. The ESD board structure and the electrostatic protection circuit have advantages of realizing wide application at an electrostatic protection aspect, reducing triggering voltage and realizing no manufacture cost increase.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular, the invention relates to an ESD layout structure and an electrostatic protection circuit. Background technique [0002] As the level of integrated circuit manufacturing technology enters the deep submicron era of integrated circuit line width, the feature size of CMOS technology continues to shrink, and the ability of transistors to withstand high voltage and high current continues to decrease. Deep submicron CMOS integrated circuits are more susceptible to electrostatic shock failure, resulting in a decrease in product reliability. [0003] Static electricity is ubiquitous in the process of chip manufacturing, packaging, testing and use. The accumulated static charge is released in nanoseconds to microseconds with a current of several amperes or tens of amperes. The instantaneous power is as high as hundreds of kilowatts, and the discharge energy It can reach millijoules, and the de...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02
CPCH01L27/0266
Inventor 汪广羊顾力晖孙贵鹏
Owner CSMC TECH FAB2 CO LTD
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