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Low temperature polysilicon thin film transistor and its manufacturing method

A technology of thin-film transistors and low-temperature polysilicon, which is applied in transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as grain boundary defects, and achieve the effect of eliminating compatibility and grain boundary defects

Active Publication Date: 2020-08-04
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The invention provides a low-temperature polysilicon thin film transistor and a manufacturing method thereof, which are used to solve the technical problem that grain boundary defects are easily generated in the production process of low-temperature polysilicon existing in the prior art

Method used

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  • Low temperature polysilicon thin film transistor and its manufacturing method
  • Low temperature polysilicon thin film transistor and its manufacturing method
  • Low temperature polysilicon thin film transistor and its manufacturing method

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Embodiment 1

[0034] Such as image 3 As shown, an embodiment of the present invention provides a method for manufacturing a low-temperature polysilicon thin film transistor, which includes the following steps:

[0035] The first step: forming a polysilicon thin film layer 2 on the substrate 1, patterning the polysilicon thin film layer 2 to obtain an active layer, and forming a gate insulating layer 3 on the active layer.

[0036] Step 2: forming a silicon oxide dielectric layer 4 on the gate insulating layer 3 .

[0037] Wherein, the thickness of the silicon oxide dielectric layer 4 can be adjusted as required, for example In this embodiment, the thickness of the silicon oxide dielectric layer 4 is It is to achieve standardized production and facilitate subsequent operations.

[0038] Step 3: forming a silicon nitride dielectric layer 5 on the silicon oxide dielectric layer 4 .

[0039] While forming the silicon nitride dielectric layer 5 , hydrogen gas is added for hydrogenation tr...

Embodiment 2

[0044] Such as Figure 4 As shown, an embodiment of the present invention provides a method for manufacturing a low-temperature polysilicon thin film transistor, which includes the following steps:

[0045] The first step: forming a polysilicon thin film layer 2 on the substrate 1, patterning the polysilicon thin film layer 2 to obtain an active layer, and forming a gate insulating layer 3 on the active layer.

[0046] Step 2: depositing a first silicon nitride layer 7 on the gate insulating layer 3 , and then depositing a silicon oxide dielectric layer 4 .

[0047] Wherein, the thickness of the first silicon nitride layer 7 is E.g

[0048] The advantage of depositing the first silicon nitride layer 7 before forming the silicon oxide dielectric layer 4 is: because the etching atmosphere of silicon nitride and silicon oxide is different, generally after the etching of the silicon nitride dielectric layer 5 is completed, start again. Etching the silicon oxide dielectric la...

Embodiment 3

[0057] Such as Figure 5 As shown, an embodiment of the present invention provides a method for manufacturing a low-temperature polysilicon thin film transistor, which includes the following steps:

[0058] The first step: forming a polysilicon thin film layer 2 on the substrate 1, patterning the polysilicon thin film layer 2 to obtain an active layer, and forming a gate insulating layer 3 on the active layer.

[0059] Step 2: first hydrogenate the gate insulating layer 3 by using hydrogen plasma, and then deposit and form a silicon oxide dielectric layer 4 .

[0060] Wherein, the time for the hydrogenation treatment is 10-40s, preferably 30s; the second silicon nitride layer 8 is formed after the hydrogenation treatment, and the thickness of the second silicon nitride layer 8 is E.g

[0061] Depositing the second silicon nitride layer 8 first can facilitate precise control of the time when the silicon oxide of the gate insulating layer 3 starts to be etched during dry et...

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Abstract

The invention relates to a low-temperature polysilicon thin-film transistor and a manufacturing method thereof, relating to the field of liquid crystal panel processing technology, and aiming at solving the technical problem that crystal boundary defects are easily caused during the production of low-temperature polysilicon in the prior art. The manufacturing method of the low-temperature polysilicon thin-film transistor comprises the following operation steps: firstly forming a silicon oxide dielectric layer on a gate insulating layer, and then forming a silicon nitride dielectric layer on the silicon oxide dielectric layer. Thereby, the film layer structure of the dielectric layer is changed, which means that the interface of the dielectric layer is changed from silicon nitride-silicon oxide into silicon oxide-silicon nitride, and as the gate insulating layer below the dielectric layer is deposited by silicon nitride, the interfaces between the dielectric layers and the gate insulating layer are the same substance, and the problem of compatibility can be eliminated; and similarly, the insulating layer is deposited by silicon oxide, and thus no compatibility problem exists between the dielectric layer and the insulating layer, which means that the crystal boundary defects of the dielectric layer and the insulating layer can be eliminated.

Description

technical field [0001] The invention relates to the technical field of liquid crystal display, in particular to a low-temperature polysilicon thin film transistor and a manufacturing method thereof. Background technique [0002] A typical low-temperature polysilicon (LTPS) film structure is as follows: figure 1 As shown, the manufacturing process is to form a polysilicon thin film layer 2 (P-Si) on a substrate 1, make a gate insulating layer 3 (GI), make a dielectric layer (ILD), hydrogenate and make an insulating layer 6; although the structure During the hydrogenation treatment, the hydrogen ion migration to the polysilicon film layer 2 has the shortest path, which has certain benefits in improving the hydrogenation efficiency and shortening the hydrogenation time, but this structure also has the following problems: due to the gate insulation The interfaces between the layer 3 and the silicon nitride dielectric layer 5 and the silicon oxide dielectric layer 4 and the insu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/786H01L21/336
CPCH01L29/66757H01L29/78675
Inventor 卢瑞
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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