Array substrate and preparation method thereof, display panel, and display equipment

A technology of an array substrate and a manufacturing method, which are applied in the fields of display devices, array substrates and manufacturing methods thereof, and display panels, can solve the problems of affecting yield, difficult to eliminate display Mura, disregarding the placement direction of excimer laser beams and thin film transistors, etc. , to achieve the effect of improving quality and yield and reducing visual defects

Inactive Publication Date: 2017-08-29
BOE TECH GRP CO LTD
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Problems solved by technology

[0003] Excimer laser annealing (ELA) is mainly used to complete the polysilicon active layer of the thin film transistor in the LTPS backplane technology. The existing technology usually does not consider the relationship between the excimer laser beam and the placement direction of the thin film transistor. The prior art design During the layout, the thin film transistors are usually placed in a fixed horizontal or vertical design, resulting in a certain periodical coincidence relationship between the edge of th

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  • Array substrate and preparation method thereof, display panel, and display equipment
  • Array substrate and preparation method thereof, display panel, and display equipment
  • Array substrate and preparation method thereof, display panel, and display equipment

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[0024] The embodiments of the present invention provide an array substrate and a manufacturing method thereof, a display panel, and a display device, which are used to reduce the visual defect of displaying Mura and improve the quality and yield of the array substrate.

[0025] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.

[0026] The array substrate provided by the specific embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

[0027...

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Abstract

The invention discloses an array substrate and a preparation method thereof, a display panel, and a display equipment, is used for reducing a visual defect for displaying Mura, and is used for improving the quality and the yield of the array substrate. The array substrate comprises pixel units arranged in several arrays on the substrate; each pixel unit includes a thin film transistor; the thin film transistor includes a polysilicon active layer; the length extending direction of a channel of the thin film transistor is parallel to a presetting direction; and the presetting direction is a scanning direction of an excimer laser beam used when the polysilicon active layer is formed.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate and a manufacturing method thereof, a display panel, and a display device. Background technique [0002] Low Temperature Poly-Silicon (LTPS) thin film transistor liquid crystal display (Thin Film Transistor Liquid Crystal Display, TFT-LCD) has the advantages of high resolution, fast response, high brightness, high aperture ratio, etc., due to LTPS TFT- The silicon crystal arrangement of LCD is more orderly than that of amorphous silicon (a-Si), so that the electron mobility is relatively higher than 100 times, and the peripheral driving circuit can be fabricated on the glass substrate at the same time, which can save space and the cost of driving integrated circuits. At the same time, the Active Matrix Organic Light Emitting Diode (AMOLED) derived from LTPS has become the best choice for future display technology due to its advantages of high image qua...

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Application Information

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IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/1222H01L27/1285H01L21/02595H01L21/02422H01L21/02488H01L21/02502H01L21/02592H01L21/02532H01L21/02686H01L29/66757H01L29/78675G02F2202/104H01L29/78672H01L29/78696H01L29/6675H01L21/02661H01L21/0262H01L27/1296G02F1/1368H10K59/1213
Inventor 田雪雁
Owner BOE TECH GRP CO LTD
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