Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Power-attack-resistant SM4 algorithm hardware implementation system

A hardware implementation and anti-power consumption technology, applied in the field of information security, can solve the problem of power consumption generated by logic gates, and achieve the effect of defending against power consumption attacks

Inactive Publication Date: 2017-09-12
北京万协通信息技术有限公司
View PDF6 Cites 8 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The dynamic power consumption is mainly generated by the inversion of the logic gate signal. When the signal changes from "0" to "1", or from "1" to "0", it is an inversion, and the logic gate will generate power consumption.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Power-attack-resistant SM4 algorithm hardware implementation system
  • Power-attack-resistant SM4 algorithm hardware implementation system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0016] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention, and are not intended to limit the present invention.

[0017] The SM4 hardware circuit design in the prior art is not effective in defending against power consumption attacks.

[0018] According to the characteristics of power consumption attack in the present invention, if the correlation between power consumption and data is destroyed, the power consumption attack method will not work. In the present invention, using the method of randomly inserting pseudo-round operation pairs, inserting pseudo-round operation pairs that have nothing to do with data operation into the SM4 hardware circuit of plaintext and key, and controlling the number of inserted...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a power-attack-resistant SM4 algorithm hardware implementation system, and relates to the technical field of information safety. According to the system, a pseudo wheel operation pair module and a random number controller are added to an SM4 algorithm hardware circuit, thereby achieving the random insertion of a pseudo wheel operation pair between the wheel operations in the SM4 encryption process. The value of data passing through the pseudo wheel operation pair will not change, but the power consumption features of a circuit and the execution time sequence features of the circuit are disturbed. The correlation between the data and the power consumption is broken, and the power attack is effectively prevented. The system can be used in a safety chip of an intelligent card and a USBKey, and also can be suitable for various types of safety chips which need to prevent the power attack for the SM4.

Description

technical field [0001] The invention relates to the technical field of information security, in particular to a hardware implementation system of an SM4 algorithm resistant to power consumption attacks. Background technique [0002] The SM4 cipher algorithm is a block cipher algorithm announced by the National Commercial Cryptography Management Office. It is currently the most widely used block cipher algorithm independently designed by China. This algorithm is gradually being applied in smart cards and USBKeys. Considering the problem of operational efficiency, it is basically Realized by hardware. In applications such as smart cards and USBKeys, the encryption algorithm can not only ensure the security of the protocol and algorithm, but more importantly, ensure that the power consumption or electromagnetic information of the encryption circuit in actual use will not be used by bypass analysis methods, causing security threats . [0003] A digital circuit is composed of s...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/00H04L9/06
CPCH04L9/002H04L9/0631H04L9/0656
Inventor 李艳华张玉禄律博
Owner 北京万协通信息技术有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com