Single machine application verification system compatible with sparc V8 framework SOC

Abstract

The invention relates to a single machine application verification system compatible with a sparc V8 framework SOC. The system comprises a single machine application verification board, an excitation source and a central control computer. For the single machine application verification board, application verification of multiple chips and system integration for a single chip are finished only by replacing chip daughter boards on the premise of maximized design of an application verification mother board; the excitation source required in an application verification process is subjected to standardized and maximized development, so that repeated use and maintenance of the single machine application verification system can be ensured, the development cost and cycle of the application verification system are greatly reduced and shortened, and system integration design and system simulation based on a to-be-verified chip can be realized; and application verification examples of mature modules are integrated in the central control computer, and the whole verification process is controlled, so that the efficiency and comprehensiveness of chip application verification are ensured, a universal platform for development by users is formed, and the performance of the verification system is exerted to the maximum extent.

Description

technical field [0001] The invention relates to the field of integrated circuit application verification, in particular to a stand-alone application verification system compatible with sparc V8 architecture SOC. Background technique [0002] Stand-alone application verification refers to the design indicators and functions of the chip, and the single-machine integrated design is carried out in a specific background to verify the correctness of the chip design function and the performance of the design indicators. Stand-alone application verification is the last link of chip R&D and design. It is an important bridge connecting chip design and chip use. The result is an important basis for user use and chip design improvement. However, the existing stand-alone application verification for sparc V8 architecture SOC chips generally uses the SOC as the main control chip to integrate the smallest system, and reserves the test interface of specific modules for testing and applicati...

AI Technical Summary

Problems solved by technology

First of all, the minimum system is integrated based on a specific device under test. Different chips or different versions of the same chip cannot be reused, and only a new set of stand-alone application verification boards can be redesigned; secondly, in order to meet the test requirements of different chips , the application verification stimulus sources that need to be provided are also different. It is necessary to design a special stimulus source or prepare specific equipment for different chips to be tested. , error-prone or insufficient application verification, design problems cannot be fully exposed, resulting in problems in the application process of the whole machine model, resulting in irreparable losses

Finally, in the application verification process, a set of general application verification process and application verification environment has not been formed due to individualism, resulting in non-standard and incomplete development of application verification software for specific chips. Manual testing is the main method, and different function combinations cannot be verified. and to automate application verification, inefficiencies

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