Nonvolatile static random access memory (NVSRAM) system having static random access memory (SRAM) array and resistive memory array

A technology of resistive memory and static random access, which is applied in the field of memory systems and can solve problems such as area inefficiency

Active Publication Date: 2017-12-05
NXP USA INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Alternative solutions include memory cells with both volatile and nonvolatile parts, but these are area inefficient

Method used

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  • Nonvolatile static random access memory (NVSRAM) system having static random access memory (SRAM) array and resistive memory array
  • Nonvolatile static random access memory (NVSRAM) system having static random access memory (SRAM) array and resistive memory array
  • Nonvolatile static random access memory (NVSRAM) system having static random access memory (SRAM) array and resistive memory array

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Embodiment Construction

[0010] NVSRAM systems consist of discrete SRAM arrays and resistive memory arrays for storing and restoring backup data. Data is stored from the SRAM array to the resistive memory array for backup and restored from the resistive memory array back to the SRAM array for normal operation. To increase area efficiency, the resistive memory array and the SRAM array share sense amplifiers. For SRAM read operations, sense amplifiers are used to provide output data. In one embodiment, the resistive memory array is an MRAM array. An MRAM read operation consists of two phases: a calibration phase and a non-calibration (ie, sensing) phase. For MRAM read operations, sense amplifiers are also used in the non-calibration phase to provide output data. In this way, a tightly coupled NVSRAM system provides adequate store and restore functionality in an area-efficient manner.

[0011] figure 1 An NVSRAM system 10 according to one embodiment of the invention is shown. System 10 includes SRA...

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Abstract

An integrated circuit (IC) device includes a static random access memory (SRAM) array, and a resistive memory (resistive memory) array. A first set of programmable resistive elements in the resistive memory array are used to store data from memory cells in the SRAM array. Sense amplifier circuitry is couplable to the SRAM array and the resistive memory array. An arbiter is configured to assert an resistive memory enable signal to couple the sense amplifier circuitry to the resistive memory array and decouple the sense amplifier circuitry from the SRAM array during a resistive memory read operation, and to couple the sense amplifier to the SRAM array and decouple the sense amplifier circuitry from the resistive memory array during an SRAM read operation.

Description

technical field [0001] The present disclosure relates generally to memory systems, and more particularly to memory systems having SRAM arrays and resistive memory arrays. Background technique [0002] Resistive memory, such as magnetoresistive RAM (MRAM), is a commonly used non-volatile memory. However, the read and write access times of resistive memories are generally slow, especially when compared to those of SRAM. Therefore, in some systems, non-volatile memory (NVM) backup to SRAM is used. In these systems, SRAM is used for operations on data, and after power is removed, data is moved from SRAM to NVM, such as MRAM. After power-on, the data is restored back to the SRAM. This solution results in the operational efficiency offered by SRAM and the non-volatility offered by MRAM. This system may be referred to as non-volatile SRAM (NVSRAM). In an NVSRAM solution, a bus interface is required between the two memories that must be switched during data transfer between the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/10G11C11/16G11C11/413
CPCG11C7/1051G11C7/1078G11C11/16G11C11/413G11C11/005G11C13/004G11C27/024G11C2013/0042G11C2013/0045G11C11/419G11C11/1673H10B10/12G11C14/0081
Inventor 阿尼尔班·罗伊乔恩·斯科特·乔伊迈克尔·A·塞德
Owner NXP USA INC
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