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Sheet generator for image processor

A technology of image data and image data frames, applied in the field of data slice generators, can solve problems such as lack of programming environment

Active Publication Date: 2017-12-05
GOOGLE LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, using custom-designed fixed-function circuits often results in a processor that can only perform a limited set of tasks
Thus, in the second extreme there is a lack of a broadly general programming environment (which is associated with the first extreme)

Method used

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  • Sheet generator for image processor
  • Sheet generator for image processor
  • Sheet generator for image processor

Examples

Experimental program
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Embodiment Construction

[0024] a. Image processor hardware architecture and operation

[0025] figure 1 An embodiment of an architecture 100 for an image processor implemented in hardware is shown. The image processor may, for example, be the target of a compiler that converts program code written for a virtual processor within a simulated environment into program code actually executed by the hardware processor. Such as figure 1 As shown, the architecture 100 includes a plurality of line buffer units 101_1 to 101_M, and the line buffer units 101_1 to 101_M are interconnected through a network 104 (eg, a network on chip (NOC), including an on-chip switching network, an on-chip ring network, or other types of networks). Connected to a plurality of template processor units 102_1 to 102_N and corresponding data slice generator units 103_1 to 103_N. In one embodiment, any line buffer unit can be connected to any data slice generator and corresponding stencil processor through the network 104 .

[0...

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PUM

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Abstract

A sheet generator circuit is described. The sheet generator includes electronic circuitry to receive a line group of image data including multiple rows of data from a frame of image data. The multiple rows are sufficient in number to encompass multiple neighboring overlapping stencils. The electronic circuitry is to parse the line group into a smaller sized sheet. The electronic circuitry is to load the sheet into a data computation unit having a two dimensional shift array structure coupled to an array of processors.

Description

technical field [0001] The field of the invention relates generally to image processing, and more particularly to data slice generators for image generators. Background technique [0002] Image processing generally involves manipulating pixel values ​​organized into arrays. Here, a spatially organized two-dimensional array captures the two-dimensional nature of the image (additional dimensions may include time (e.g., sequence of two-dimensional images) and data type (e.g., color). In a typical scenario, an array of pixel values Supplied by cameras that already generate still images or frame sequences to capture images in motion. Traditional image processors typically fall into one of two extremes. [0003] The first extreme performs image processing tasks as a software program executing on a general-purpose processor or general-purpose processor (eg, a general-purpose processor with vector instruction enhancement). While the first extreme typically provides a highly genera...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20
CPCG06T1/20G06T1/60H04N1/32101G06T2200/28B41F15/0804
Inventor 阿尔伯特·迈克斯纳杰森·鲁珀特·莱德格雷夫奥弗尔·莎查姆朱秋玲丹尼尔·弗雷德里克·芬舍尔施泰因
Owner GOOGLE LLC