Semiconductor device and manufacturing method thereof
A semiconductor and device technology, applied in the field of semiconductor devices and their manufacturing, can solve the problem of not being able to effectively prevent over-etching and etching of via holes
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no. 1 example
[0021] In forming the device 50 with reference to figure 1 with Figure 2A to Figure 8C A first embodiment of the method 10 is described below. As will be shown, device 50 is a multi-gate device. More specifically, it is a FinFET device. In this regard, Figure 2A , Figure 3A , Figure 4A , Figure 5A , Figure 6A , Figure 7A with Figure 8A shows a cross-sectional view of the device 50 cut along the length of the fin; Figure 2B , Figure 3B , Figure 4B , Figure 5B , Figure 6B , Figure 7B with Figure 8B shows a cross-sectional view of the device 50 cut along the width of the fin in the channel region of the device 50; and Figure 2C , Figure 3C , Figure 4C , Figure 5C , Figure 6C , Figure 7C with Figure 8C A cross-sectional view of device 50 cut along the width of the fin in the source / drain (S / D) region of device 50 is shown. Those of ordinary skill in the art will appreciate that embodiments of method 10 may be used to form planar transisto...
no. 2 example
[0039] In forming the device 100 with reference to figure 1 with Figure 9A to Figure 9G A second embodiment of the method 10 is described below.
[0040] refer to figure 1 , in operation 12, as Figure 9A As shown, method 10 provides a precursor to device 100 . For ease of discussion, the precursor to device 100 is also referred to as device 100 . refer to Figure 9A , the device 100 includes a substrate 102 , a dielectric layer 104 over the substrate 102 , and conductive features 106A and 106B in the dielectric layer 104 . In the illustrated embodiment, device 100 further includes barrier layers 107A and 107B positioned between conductive features 106A and 106B and dielectric layer 104 .
[0041] In an embodiment, the substrate 102 includes a silicon substrate (eg, a wafer). Alternatively, the substrate 102 may include another elemental semiconductor such as germanium; a compound semiconductor including silicon carbide, gallium arsenide, gallium phosphide, indium phos...
no. 3 example
[0057] In forming the device 200 with reference to figure 1 , Figure 10 with Figures 11A to 11G A third embodiment of the method 10 is described below.
[0058] Figure 10 A method 30 of forming semiconductor device 200 is shown wherein an air gap is formed between conductive features 106A and 106B and wherein etch stop layer 110 serves as the bottom and sidewalls of the air gap. Method 30 can be seen as an embodiment of method 10 and is briefly discussed below.
[0059] In operation 12, method 30 ( Figure 10 ) provides the precursor of the semiconductor device 200, with Figure 9A The device 100 in is substantially the same. Method 30 proceeds from operation 12 to operation 32 .
[0060] In operation 32, method 30( Figure 10 ) etch a trench 130 in the dielectric layer 104 adjacent one of the conductive features 106A and 106B. For ease of discussion, as Figure 11A As shown, a trench 130 is etched between conductive features 106A and 106B. The trench 130 is a re...
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