Semiconductor device, manufacture method for the same and electronic device

Abstract

The invention provides a semiconductor device, a manufacture method for the same and an electronic device. The manufacture method for the semiconductor device comprises steps of providing a semiconductor substrate, wherein the semiconductor substrate at least comprises a storage area and a contact plugging area, forming multiple layers of laminating structures on the semiconductor substrate in thestorage area and each laminating layer structure comprises a dielectric layer and a control gate layer arranged over the dielectric layer, forming a first dielectric layer covering the multiple layers of laminating layer structures and the contact plugging area, forming multiple first contact plugs which correspond to the control gate layer in the multiple layers of laminating layers in the firstdielectric layer in the contact plugging area, forming a second dielectric layer on the first dielectric layer and forming multiple second contact plugs which are in corresponding connection with multiple first contact plugs in the second dielectric layer. The manufacture method can reduce technology difficulty and cost and the semiconductor device and the electronic device are simple in structure and low in cost.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] With the development of semiconductor process technology and the industry's demand for memory with high integration density and large storage capacity, 3D NAND (three-dimensional NAND) memory has emerged as the times require. A 3D NAND structure such as Figure 6 As shown, it includes a multi-layer storage array 1, the bottom selection gate LS (Lower SG) and the source line SL (Source Line) below the displacement storage array 1, the top selection gate US (Upper SG) above the storage array 1, The bit line BL (Bit Line) located above the select gate on the top layer, and the control gate CG (Control Gate) extending from each layer of the memory array 1 . For each layer of memory, it extends from the control gate of this layer, and is connected to the cont...

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Problems solved by technology

With people's pursuit of storage capacity, it is necessary to manufacture larger-capacity memories, and it is also necessary to manufacture more layers of control gates. If the number of layers increases to, for example, 128 layers or more multiples of layers, in such a structure, the same step It is very difficult to make through holes with different depths in the process, and the step structure control gate structure and contact plugs increase the cost per bit. In addition, it is necessary to make the step structure control gate structure and contact plugs. Requires many steps of photolithography process, which correspondingly increases the fabrication cost of the device

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