Semiconductor device, manufacturing method, and electronic device
A semiconductor and device technology, applied in the field of semiconductor devices and preparation methods, electronic devices, can solve the problems of zero mark failure, cumbersome process, and additional steps
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[0049] In order to solve the above-mentioned problems existing in the current technology, the invention provides a method for preparing a semiconductor device, the method comprising:
[0050] providing a first wafer having a layer zero mark formed therein;
[0051] forming a passivation layer on the first wafer to cover the first wafer;
[0052] patterning the passivation layer to form an alignment mark in the passivation layer over the zero layer mark;
[0053] providing a second wafer and bonding to the first wafer;
[0054] patterning the second wafer to form openings exposing the alignment marks;
[0055] A functional material layer is formed on the surface of the opening and the surface of the alignment mark.
[0056] Wherein, the method for forming the zero-layer mark and the alignment mark includes:
[0057] providing a first wafer, in which a plurality of first grooves spaced apart from each other are formed as the zero-layer marks;
[0058] depositing the passivati...
Embodiment 1
[0063] The preparation method of the semiconductor device of the present invention is described in detail below with reference to the accompanying drawings, figure 1 Shows a flow chart of the fabrication process of the semiconductor device of the present invention; Figures 2A-2F A schematic cross-sectional view showing a structure obtained by implementing a method for manufacturing a semiconductor device according to an embodiment of the present invention; image 3 A schematic diagram of an electronic device according to an embodiment of the present invention is shown.
[0064] The invention provides a method for preparing a semiconductor device, such as figure 1 As shown, the main steps of the preparation method include:
[0065] Step S1: providing a first wafer in which a zero-layer mark is formed;
[0066] Step S2: forming a passivation layer on the first wafer to cover the zero-layer mark;
[0067] Step S3: patterning the passivation layer to form an alignment mark in...
Embodiment 2
[0110] The present invention also provides a semiconductor device, which is prepared by the method described in the first embodiment.
[0111] The semiconductor device includes:
[0112] first wafer;
[0113] a zero layer mark located in the first wafer;
[0114] a passivation layer located on the first wafer and filling the zero-layer mark;
[0115] an alignment mark in the passivation layer and above the zero layer mark;
[0116] A second wafer, where the second wafer is integrated with the first wafer through the passivation layer.
[0117] Wherein, an opening is formed in the second wafer to expose the alignment mark.
[0118] Wherein, a functional material layer is further formed on the surface of the opening and the surface of the alignment mark.
[0119] Wherein, the semiconductor device includes an inertial sensor.
[0120] The first wafer 201 may be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), s...
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