Vacuum hot pressing sintering preparation method of a high-purity tantalum-ruthenium alloy target

Abstract

The invention relates to a vacuum thermal pressing and sintering preparation method of a high-purity tantalum-ruthenium alloy target material, and belongs to the technical field of powder metallurgy.The preparation method comprises the steps of preparing raw material powder, mixing the powder, and thermally pressing and sintering the target material in vacuum. The preparation method specificallycomprises the steps of correspondingly crushing high-purity tantalum and ruthenium blocks until the diameter is less than 2mm, and screening to obtain tantalum powder and ruthenium powder; grinding the tantalum powder and the ruthenium powder under the particle size is 5-200 microns; mixing the grinded powder based on certain ratio to obtain a mixture; drying the mixture, and then feeding the mixture into a graphite die; transferring the die into a thermal pressing furnace for vacuum thermal pressing and sintering to obtain a blank of the f high-purity tantalum-ruthenium alloy target; and thenprocessing the blank based on the requirement of a magnetron sputtering coating device to obtain the high-purity tantalum-ruthenium alloy target material. With the adoption of the preparation method,the technical difficulty that an alloy target is hard to smelt by a traditional casting method can be obviously reduced; the controllability of the material structure and performance can be greatly improved; and the following film coating performance can be obviously improved.

Description

technical field

[0001] The invention belongs to the technical field of powder metallurgy, and in particular relates to a method for preparing a high-purity tantalum-ruthenium alloy target by vacuum hot-pressing sintering. Background technique

[0002] At present, electronic components are becoming increasingly small and miniaturized, so the requirements for the integration of integrated circuits and chips are getting higher and higher, resulting in increasingly stringent requirements for the thickness of the diffusion barrier layer in the preparation of integrated circuits. Many years ago, at the 45nm technology node of the chip, the thickness requirement of the diffusion barrier layer of the first metal wiring of the copper interconnection has reached 3.3nm. While being thinner, it must also have good semiconductor and mechanical properties. These quality requirements lead to the development of new materials and processes for the diffusion barrier layer.

[0003] As a key ...

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