A wafer structure and testing method thereof
A test method and wafer technology, applied in the direction of testing semiconductor materials, semiconductor/solid-state device testing/measurement, measuring devices, etc., can solve the problems that affect the accuracy of test results, oxidative environment setting errors, high development and debugging costs, etc., to achieve reduction Effects of testing time and cost, reducing time and cost, and reducing errors in test results
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Embodiment 1
[0026] HEMTs and VCSELs are commonly used power devices. During their fabrication, an epitaxial layer with high aluminum content needs to be oxidized by wet oxygen. Depending on the structure, the oxidation depth ranges from a few microns to more than ten microns. In the oxidation process, the oxidation depth is required to be precisely controllable and repeatable. In this embodiment, the GaAs material is doped with aluminum at different concentrations to form metal layers 113 containing aluminum at different concentrations, and the aluminum content ranges from 92% to 98%. Such as figure 1 As shown, a multi-layer metal layer 113 is grown layer by layer on a GaAs substrate 110, and the aluminum content of the metal layer 113 is 98%, 97%, 96%, 95%, 94% along the direction away from the substrate 110. %, 93%, 92%, a total of seven metal layers 113 are formed. The doped carriers, concentration and thickness of the metal layer 113 are consistent with those of real power devices. ...
Embodiment 2
[0028] The concept of the present invention is also applicable to testing the oxidation speed of real power devices with different thicknesses. When the thickness of the real power device to be tested is different, the thickness of the metal layer 113 can be set according to the thickness of the real power device, and then the oxidation speed of the metal layer 113 with various thicknesses can be obtained at the same time, which also has the advantages of reducing development and debugging costs and improving The effect of test result accuracy.
[0029] A test method for testing the wafer structure, comprising the following steps:
[0030] Firstly, the side surface of the metal layer 113 is exposed by dry etching. The etched wafer structure 100 is placed in the furnace tube 4 . The wafer structure 100 is then subjected to wet oxidation. Such as figure 2 As shown, the nitrogen gas passes through the mass flow meter 1 to control its feeding amount, then passes through the w...
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