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A method of forming a semiconductor structure

A semiconductor and isolation structure technology, applied in the field of semiconductor structure formation, to achieve the effect of improving process accuracy and improving electrical performance

Active Publication Date: 2021-04-30
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this application focuses on the description of the process flow, but does not describe the specific applicable process steps in detail, so it is still quite difficult to realize the ideal fin structure and active region structure morphology in the actual process

Method used

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  • A method of forming a semiconductor structure
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  • A method of forming a semiconductor structure

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Experimental program
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Embodiment Construction

[0031] The core idea of ​​the method for forming a semiconductor structure provided by the present invention is to use advanced process control to form a fin-shaped channel structure (fin) and a device isolation structure step by step, and thereby independently adjust the physical morphology of the two, thereby improving Process accuracy, uniformity, stability, and its process results help to improve the related electrical properties of field effect transistor devices (such as switching current ratio I on / I off ).

[0032] The method for forming a semiconductor structure for forming a fin-shaped structure and an isolation structure provided by the present invention is mainly applicable to the formation process of source-drain and channel physical structures of the semiconductor process technology generation below 20nm, and is also useful for the formation of other fin-shaped physical structures. Reference meaning.

[0033] The specific embodiment of the present invention wi...

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Abstract

The invention discloses a method for forming a semiconductor structure, comprising: forming a hard mask layer and a photolithographic pattern of a fin structure on a semiconductor substrate; patterning the hard mask layer and the semiconductor substrate to obtain a fin structure with sidewall morphology; forming a protective layer on the sidewall surface of the fin structure; etching the semiconductor substrate under the fin structure to form an isolation structure groove; filling the isolation structure groove with a dielectric layer and performing planarization; performing groove etching on the dielectric layer to form a fin structure and an isolation structure with inclined sidewalls. The invention can separately adjust the physical appearance of the side walls of the fin structure and the isolation structure, improve the process precision, uniformity and stability, and help to improve the electrical performance and reliability of the field effect tube device.

Description

technical field [0001] The present invention relates to the technical field of semiconductor integrated circuit manufacturing technology, and more particularly, to a method for forming a semiconductor structure having a fin structure and an isolation structure. Background technique [0002] When the semiconductor process developed to the 22nm technology node, the CMOS manufacturing process began to transition from planar transistors to three-dimensional FinFET device structures. Compared with planar transistors, FinFET devices have improved channel control and reduced short-channel effects. Furthermore, the gate of a planar transistor is above the channel, whereas the gate of a FinFET typically surrounds the channel on three sides, allowing electrostatic control of the channel on both sides. The above-mentioned changes in the device structure have brought great challenges to the CMOS manufacturing process. At the 22nm process node, the aspect ratio of the fin (Fin) structu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238
CPCH01L21/823821H01L21/823878H01L21/3065H01L21/31111H01L21/76224H01L21/02238H01L21/76232H01L21/76205H01L21/02323H01L21/3081H01L21/31053H01L21/31116
Inventor 王伟军林宏
Owner SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT