Partial-split pipelined successive approximation ADC digital circuit

Abstract

The invention discloses a partial-split pipeline successive approximation ADC digital circuit, belongs to the technical field of the basic electronic circuit, and especially relates to a background calibration method of pipelined-successive approximation analog-to-digital converter ADC. The whole architecture is composed of two-stage successive approximation analog-to-digital converter ADCs; the front stage comprises a DAC module, a comparator module, an approximate detector and a SAR logic module; the backward stage comprises two same ADCs separated from each other; and two stages are connected through a margin amplifier module. Through a way of adopting the backward stage separated ADC structure and outputting a code as the difference, a calibration method of the DAC actual bit weight isrealized at a digital domain; the circuit structure is simple, the reduction of the signal-to-noise distortion ratio caused by capacitor mismatch and limited gain of the operational amplifier is obviously improved, and the whole conversion precision of the ADC is improved, and the circuit performance is optimized.

Description

technical field [0001] The invention discloses a partially split pipeline successive approximation ADC digital circuit, which belongs to the technical field of basic electronic circuits, and in particular relates to background calibration of pipeline-successive approximation analog-to-digital converters. Background technique [0002] In recent years, the Pipelined-SAR ADC architecture has become a research hotspot because it combines the low power consumption of successive approximation analog-to-digital converters and the advantages of high-speed and high-precision pipelined analog-to-digital converters. In a pipelined ADC, the capacitance mismatch and the finite gain error of the operational amplifier limit the conversion accuracy, so a calibration scheme is usually used to eliminate the error, however, the traditional calibration algorithm is relatively complex and slow to converge, making it difficult to achieve relatively efficient calibration . [0003] In 2005, J.McN...

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Problems solved by technology

[0004] The purpose of the invention of the present invention is to provide a partial split pipeline successive approximation ADC digital calibration circuit for the deficiencies of the above-mentioned background technology, which uses the structure of the back-stage separation SAR to calculate and store the actual bit weight of the front-stage SAR, and realizes the adjustment of the capacitance The calibration of mismatch and finite gain error of the op amp improves the convergence speed while ensuring the calibration effect, and solves the problem that the algorithm for calculating the offset mismatch and gain mismatch between separate ADCs is too complex and the foreground calibration interferes with the ADC. Technical issues with normal conversion

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