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Semiconductor package and method of manufacturing same

A semiconductor and encapsulation technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as increasing costs or processing time

Pending Publication Date: 2019-03-05
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method may also involve an additional process for removing the protective layer, which increases the cost or processing time for manufacturing the semiconductor device package

Method used

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  • Semiconductor package and method of manufacturing same
  • Semiconductor package and method of manufacturing same
  • Semiconductor package and method of manufacturing same

Examples

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Embodiment Construction

[0021] Embodiments of the present invention and their uses are discussed in detail below. It should be appreciated, however, that the embodiments illustrate many applicable concepts that can be embodied in a wide variety of specific contexts. It should be understood that the following disclosure provides many different embodiments, or examples, of implementing different features of various embodiments. Specific examples of components and configurations are described below for purposes of discussion. Of course, these are examples only and are not intended to be limiting.

[0022] Unless otherwise specified, such as "above", "below", "above", "left", "right", "below", "top", "bottom", "vertical", "horizontal", Spatial descriptions of the terms "side", "higher", "lower", "upper", "above", "beneath" etc. are used herein with respect to the orientation shown in the corresponding figure. It should be understood that the spatial descriptions used herein are for illustrative purpos...

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Abstract

The invention discloses a semiconductor package including a die and a patterned conductive layer electrically connected to the die. The patterned conductive layer includes a connection pad and a trace. The semiconductor package further includes an encapsulation layer encapsulating the die and the patterned conductive layer. The semiconductor package further includes an electrical connection element disposed on the connection pad and a protection layer including a sidewall portion surrounding the electrical connection element.

Description

technical field [0001] The present invention generally relates to semiconductor packages and methods of manufacturing the same. Background technique [0002] In a semiconductor device package, there may be an interface between the substrate and the molding compound. During thermal processing, a mismatch in the respective coefficients of thermal expansion (CTE) between the substrate and molding compound can cause the semiconductor device package to warp, and thus the substrate may separate from the molding compound during thermal processing. [0003] In semiconductor device packaging, a protective layer may be provided on a substrate prior to mounting solder balls. Portions of the protective layer can be removed to expose the connection pads of the substrate so that they can receive solder balls for external connections. This method may also involve an additional process for removing the protective layer, which increases the cost or processing time for manufacturing the sem...

Claims

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Application Information

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IPC IPC(8): H01L23/482H01L23/31H01L21/56H01L23/488H01L21/60
CPCH01L21/568H01L23/3171H01L23/3185H01L23/482H01L24/11H01L24/13H01L2224/0231H01L2224/02381H01L2224/02331H01L24/96H01L2224/94H01L2224/96H01L23/3107H01L21/561H01L21/6835H01L2221/68359H01L2224/03849H01L24/03H01L24/05H01L24/16H01L24/20H01L24/97H01L2224/03464H01L2224/0401H01L2224/05571H01L2224/05611H01L2224/05644H01L2224/05655H01L2224/10126H01L2224/11849H01L2224/12105H01L2224/13111H01L2224/16227H01L2224/16235H01L2924/15311H01L2924/1579H01L2924/3511H01L2924/3512H01L2924/35121H01L2224/11H01L2224/03H01L21/56H01L23/3135H01L23/3121H01L24/01H01L24/83H01L23/4824H01L2224/05025H01L2924/151H01L2225/06548H01L2924/0002
Inventor 颜尤龙陈光雄梁心丞徐沛妤
Owner ADVANCED SEMICON ENG INC
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