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FPGA-based 10-gigabit fiber Ethernet to RapidIO multi-channel image transmission processing system

A processing system and image processing technology, which is applied in the direction of TV system, transmission system, simultaneous/sequential multi-TV signal transmission, etc. that adapt to optical transmission, and can solve problems such as inability to complete long-distance transmission.

Inactive Publication Date: 2019-03-22
SOUTH WEST INST OF TECHN PHYSICS
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0003] The technical problem to be solved by the present invention is: RapidIO is a bus in the box and cannot complete long-distance transmission

Method used

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  • FPGA-based 10-gigabit fiber Ethernet to RapidIO multi-channel image transmission processing system
  • FPGA-based 10-gigabit fiber Ethernet to RapidIO multi-channel image transmission processing system
  • FPGA-based 10-gigabit fiber Ethernet to RapidIO multi-channel image transmission processing system

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Embodiment 1

[0019] A multi-channel image transmission processing system based on FPGA 10 Gigabit optical fiber Ethernet to RapidIO, including a network interface, FPGA and RapidIO switching module, wherein FPGA includes a network receiving module, a data processing module, a RapidIO sending module and a RapidIO flow control module;

[0020] The network interface includes 10G SFP+ 10G optical module, which is used to convert the image data transmitted through the 10G network into image data of electrical signal type, and transmit the image data to FPGA through the network;

[0021] The network receiving module is used to unpack the image data transmitted to the FPGA according to the Ethernet protocol, and send the unpacked image data to the data processing module;

[0022] The data processing module is used to cache the image data sent by the network receiving module according to different Ethernet IP addresses, and send it to the RapidIO sending module after repackaging according to the Ra...

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Abstract

The invention belongs to the field of data conversion, and particularly relates to an FPGA-based 10-gigabit fiber Ethernet to RapidIO multi-channel image transmission processing system. The system comprises a network interface, an FPGA and a RapidIO switching module, wherein the FPGA comprises a network receiving module, a data processing module, a RapidIO transmitting module and a RapidIO trafficcontrol module. According to the FPGA-based 10-gigabit fiber Ethernet to RapidIO multi-channel image transmission processing system, long-distance transmission of large-capacity multi-channel imagesis implemented by using the fiber 10-gigabit Ethernet, a gigabit optical module is connected to the FPGA for high-speed conversion between a network protocol and a RapidIO protocol, and image data isforwarded to each node by a RapidIO bus to realize data conversion and transmission of the multi-channel large-capacity image data 10-gigabit fiber Ethernet and the RapidIO high-speed serial bus inside the embedded system, so that the remote image data is conveniently and reliably transmitted to an image processing board in the system at a high speed.

Description

technical field [0001] The invention belongs to the field of data conversion, and in particular relates to an FPGA-based 10 Gigabit optical fiber Ethernet-to-RapidIO multi-channel image transmission processing system. Background technique [0002] With the wide application of high-definition cameras, higher requirements are put forward for image transmission and processing systems with large bandwidth, low latency, low cost, high reliability, and high performance in security, military, and monitoring fields. RapidIO is a high-performance, low-pin-count, packet-based interconnection architecture and an open interconnection technology standard. RapidIO is mainly used in the internal interconnection of embedded systems, and supports chip-to-chip and board-to-board communication. However, RapidIO is an in-box bus and cannot complete long-distance transmission. Contents of the invention [0003] The technical problem to be solved by the present invention is: RapidIO is a bus i...

Claims

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Application Information

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IPC IPC(8): H04N7/22H04N7/08H04N5/14H04L29/06
CPCH04L69/08H04N5/14H04N7/0806H04N7/22
Inventor 卫攸宁梅员郝红宇赵海波张宇杨鹏毛微
Owner SOUTH WEST INST OF TECHN PHYSICS
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