A preparation method of selective emitter and a preparation method of selective emitter battery
An emitter and selective technology, applied in photovoltaic power generation, circuits, electrical components, etc., can solve problems such as increased process complexity, increased equipment investment costs, and reduced production efficiency, achieving high photoelectric conversion efficiency and mass production threshold The effect of low cost and high production efficiency
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Embodiment 1
[0042] A preparation method for a selective emitter, the preparation process is as follows figure 1 shown, including the following steps:
[0043] S1. Cover the quartz mask on the textured silicon wafer, so that the quartz mask of the quartz mask coincides with the silicon wafer illumination area, wherein the distance between the quartz mask and the silicon wafer is 1mm, that is, the quartz mask The mask foot height (d) of the film is 1 mm; the distance between two adjacent quartz masks is 20 μm, that is, the mask distance (w) of the quartz mask is 20 μm. In this step, the top view and side view of the quartz mask are as follows figure 2 with 3 shown.
[0044] S2. Send the quartz mask plate and the silicon wafer into the diffusion furnace for high-doped deep diffusion, and form a highly-doped deep diffusion area in the electrode area of the silicon wafer. The parameters of the high-doped deep diffusion are: temperature 780°C , the diffusion small nitrogen flow rate is 8...
Embodiment 2
[0050] A preparation method for a selective emitter battery, the preparation process is as follows Figure 4 shown, including the following steps:
[0051] (1) Texturing silicon wafers: Texturing P-type monocrystalline silicon wafers in a tank machine, the texturing solution used is potassium hydroxide aqueous solution with a mass concentration of 8%, and the texturing temperature is 80 ℃, and the time of texturing treatment is 300 s. After the texturing is completed, the silicon wafer is cleaned with deionized water and dried.
[0052] (2) Preparation of selective emitter on the textured silicon wafer:
[0053] (2.1) Cover the quartz mask on the textured silicon wafer, so that the quartz mask of the quartz mask coincides with the silicon wafer illumination area, and the distance between the quartz mask and the silicon wafer is 1mm, that is, the quartz The foot height (d) of the mask is 1 mm; the distance between two adjacent quartz masks is 20 μm, that is, the mask distanc...
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