dsp serial communication circuit using single chip cpld expansion

Abstract

The invention discloses a DSP serial communication circuit extended by a single-chip CPLD, which uses a CPLD to control the sequential logic of serial communication between the DSP and the outside. , and DSP control to realize the expansion of the DSP serial port with the least chip. The CPLD is divided into a data receiving sub-module COM_RX, a parallel port reading sub-module Read and an output sub-module COM_TX. The COM_RX sub-module uses the reference clock to perform real-time falling edge detection of the receiving pin rxd. When the clocks are all low level, it is determined as the start bit of the data to ensure the correct detection of the start bit; and reasonable logic and timing design such as loop counter, stop counter, frequency divider, shift register, etc. are designed to achieve automatic , Receiving data with high reliability and reducing bit error rate.

Description

technical field [0001] The invention relates to the technical field of embedded servo control, in particular to a DSP serial communication circuit extended by a single-chip CPLD. Background technique [0002] DSP embedded servo control products play an extremely important role in communication, electronics, industrial control, medical, aviation guidance, network and other fields due to their advantages of small size, low power consumption and strong processing capability. [0003] At present, in the field of complex multi-serial communication servo control systems, a single-chip DSP generally provides 3 serial ports, but the number is often insufficient. When the serial port of DSP needs to be expanded, most of the technologies used are DSP+FPGA+memory combination, dual DSP combination, DSP+ST16C554D (four-channel asynchronous transceiver)+CPLD and other combinations; among them, the combination scheme of DSP+FPGA+memory requires Adding FPGA, memory and peripheral circuits ...

AI Technical Summary

Problems solved by technology

[0003] At present, in the field of complex multi-serial port communication servo control systems, a single-chip DSP generally provides 3 serial ports, which are often not enough

When it is necessary to expand the serial port of DSP, most of the technologies used are DSP+FPGA+memory combination, double DSP combination, DSP+ST16C554D (four-channel asynchronous transceiver)+CPLD and other combination methods; among them, the combination scheme of DSP+FPGA+memory requires Adding FPGA, memory and its peripheral circuits is not only relatively expensive, but also the FPGA software design is relatively complicated; for the combination of dual DSPs, it can provide 6 serial ports, but for servo control products that only need 4 serial ports, it will cause serious problems. The waste of hardware resources is avoided, and the price of a DSP is much higher than that of CPLD; for the combination of DSP+ST16C554D+CPLD, ST16C554D+CPLD is used to realize serial port related timing, but the circuit is more complicated due to the need of ST16C554D and its peripheral circuits

It can be seen that the above-mentioned method of extending the serial port of DSP is not conducive to product integration and miniaturization design requirements, and cannot meet the hardware integration, high reliability, and low-cost data interaction requirements of modern servo control products for multi-serial port communication systems.

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