Single-grid control voltage current sampling device based on LIGBT
A technology for controlling voltage and current sampling, which is applied to electrical components, semiconductor devices, circuits, etc., can solve the problems that current sampling and voltage sampling cannot be performed at the same time, and cannot fully meet high-voltage applications, so as to achieve controllable sampling ratio and sampling accuracy high effect
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Embodiment 1
[0030] A single-gate control voltage and current sampling device based on LIGBT of the present invention, such as image 3As shown, its cell structure includes a first conductivity type semiconductor substrate 1 and a substrate electrode 19 located on the lower surface of the first conductivity type semiconductor substrate 1; the upper surface of the first conductivity type semiconductor substrate 1 has an epitaxial oxide layer 2; the upper surface of the epitaxial oxide layer 2 has a second conductivity type semiconductor drift region 3; the second conductivity type semiconductor drift region 3 has a second conductivity type semiconductor doped region 4; the second conductivity type semiconductor doped region The impurity region 4 has a semiconductor anode region 5 of the first conductivity type, and the upper surface of the semiconductor anode region 5 of the first conductivity type has a first metal electrode 11; the semiconductor drift region 3 of the second conductivity ty...
Embodiment 2
[0039] Such as Figure 4 As shown, the difference between this embodiment and Embodiment 1 is that: the second conductivity type semiconductor doped region 7, the first conductivity type semiconductor doped region 8, the second conductivity type semiconductor doped region 8, and the second conductivity type semiconductor doped region 7 are arranged in sequence on the right side of the second conductivity type semiconductor cathode region 6. A conductivity type semiconductor cathode region 9; a gap is provided between the right side of the second conductivity type semiconductor cathode region 6 and the second conductivity type semiconductor doped region 7, the second conductivity type semiconductor doped region 7 and the first conductivity type semiconductor The doped regions 8 are arranged adjacent to each other.
Embodiment 3
[0041] Such as Figure 5 As shown, the difference between this embodiment and Embodiment 1 is that: the first conductivity type semiconductor cathode region 9, the second conductivity type semiconductor doped region 7, and the first conductivity type semiconductor cathode region 6 are sequentially arranged on the right side of the second conductivity type semiconductor cathode region 6. The doped region 8 ; the second conductivity type semiconductor doped region 7 and the first conductivity type semiconductor doped region 8 are arranged adjacent to each other.
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