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A double-sided alignment process method for wafer processing

A process method and backside alignment technology, which is applied to the photolithography process of the patterned surface, instruments, semiconductor/solid-state device testing/measurement, etc., can solve the problem that the lithography machine cannot guarantee the alignment accuracy of the wafer, and achieve The effect of high precision and simple process method

Active Publication Date: 2020-12-18
CHENGDU HIWAFER SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to solve the problem that the lithography machine without double-sided alignment function in the prior art cannot guarantee the alignment accuracy of the double-sided process of the wafer, and provides a double-sided alignment method for wafer processing. The alignment process method, the method is suitable for the process production of the wafer by the lithography machine without double-side alignment function, comprising the following steps:

Method used

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  • A double-sided alignment process method for wafer processing
  • A double-sided alignment process method for wafer processing
  • A double-sided alignment process method for wafer processing

Examples

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Embodiment 1

[0037] In Example 1, such as figure 1 As shown, a double-sided alignment process method for wafer processing is provided, which is especially suitable for a lithography machine without a double-sided alignment function to perform a double-sided process on a flat-edge wafer. The method specifically includes the following steps :

[0038] S01: Make the front alignment mark of the flat-edge wafer, and perform the front-side process of the flat-edge wafer; wherein, the production of the front-side alignment mark includes the center point of the flat-edge wafer parallel or perpendicular to the flat-edge wafer Two front alignment marks equidistant from the center of the wafer are set on the center line of the wafer on the flat side of the wafer. Such as figure 2 As shown, the flat-side wafer in the figure is a 6-inch flat-side wafer, b and c are the front alignment marks of the flat-side wafer, and h is the flat side of the flat-side wafer. More specifically, the front-side proc...

Embodiment 2

[0044] This implementation has the same inventive concept as Embodiment 1. On the basis of Embodiment 1, a double-sided alignment process method for wafer processing is provided, which is suitable for photolithography without double-sided alignment function. The machine performs double-sided process manufacturing on the non-flat wafer, and the method specifically includes the following steps:

[0045] S11: Make the front alignment mark of the non-flat wafer, and perform the front process of the non-flat wafer; wherein, the production of the front alignment mark includes selecting a non-flat edge of the non-flat wafer, connecting any non-flat Two points on the flat edge establish a virtual flat edge, such as Figure 4 The virtual flat edge h' in the virtual flat edge h' is parallel or perpendicular to the non-flat edge wafer center line that passes through the non-flat edge wafer center point, and the left and right two fronts that are equidistant from the wafer center are set ...

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Abstract

The invention discloses a double-sided alignment process method for wafer processing, and belongs to the technical field of semiconductor measurement. The method comprises the following steps of: S01,manufacturing a front alignment mark of a wafer, and carrying out front process manufacturing of the wafer; S02, turning over the wafer, and making a back alignment mark; S03, measuring a deviation distance from the front alignment mark of the wafer to the back alignment mark of the wafer, and an included angle, namely a deviation angle, between the distance from the back alignment mark of the wafer to the circle center of the wafer and the distance from the front alignment mark of the wafer to the circle center of the wafer, compensating by a photoetching machine table according to the deviation distance and the deviation angle, and remanufacturing the back alignment mark of the wafer; and S04, compensating by the photoetching machine table according to the micro deviation Tx of the front alignment mark of the wafer and the back alignment mark of the wafer in the X direction and the micro deviation Ty of the front alignment mark of the wafer and the back alignment mark of the wafer in the Y direction, and manufacturing the back process of the wafer according to the technological process requirements of the wafer. The method has the characteristics of simple process method, convenience and high precision.

Description

technical field [0001] The invention relates to the technical field of semiconductor measurement, in particular to a double-sided alignment process method for wafer processing. Background technique [0002] At present, in the semiconductor manufacturing process, double-sided processing of wafers is often involved, and the alignment accuracy of double-sided processing greatly affects the quality of products. However, the current lithography machine for double-sided processing of wafers does not have the double-side alignment function. To realize both the front and back side lithography processes of the wafer on this machine, a good double-side alignment process is required. , in order to achieve the alignment accuracy of front and back processing. [0003] At present, another method is to separately configure the back alignment device for the lithography machine. Obviously, this greatly increases the operating cost of the equipment. [0004] To sum up, it is very necessary ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/68H01L21/66H01L23/544G03F9/00
Inventor 周华芳
Owner CHENGDU HIWAFER SEMICON CO LTD
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