A method of manufacturing a semiconductor device and an integrated semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device and an integrated semiconductor device. In the method, a dielectric island is formed on an epitaxial layer during the manufacturing process of the semiconductor device. The implantation of channel ions is ensured, and the ion concentration under the dielectric island is low, which greatly improves the breakdown reliability of the device in the on state; at the same time, due to the existence of the dielectric island, the thickness of the gate dielectric layer increases, reducing the gate Capacitors reduce switching losses of the device. At the same time, using the dielectric island as a mask during the manufacturing process, the source region of the first doping type can be formed by self-alignment, which saves a photolithography plate and reduces the process cost.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a semiconductor device and an integrated semiconductor device. Background technique [0002] Existing semiconductor devices include enhancement mode and depletion mode semiconductor devices, such as vertical double diffused metal oxide field effect devices (VDMOS) including enhancement mode VDMOS devices and depletion mode VDMOS devices, which have good on-off characteristics and low power consumption. Advantages, widely used in LED drivers, power adapters, etc. However, most of these existing semiconductor devices are individually packaged, which brings disadvantages such as increased process cost and excessive chip area. [0003] A method of integrating an enhanced VDMOS device and a depleted VDMOS device semiconductor device is based on the conventional enhanced VDMOS manufacturing process. It is often necessary to add a Vt injection plate...

AI Technical Summary

Problems solved by technology

However, most of these existing semiconductor devices are independently packaged, which brings disadvantages such as increased process costs and excessive chip area.

[0003] A method of integrating an enhanced VDMOS device and a depleted VDMOS device semiconductor device is based on the conventional enhanced VDMOS manufacturing process. It is often necessary to add a Vt injection plate to form a depleted channel on the surface, and the process is complicated. cost increase

However, when the depletion-mode VDMOS device works in the on-state, due to the high concentration near the channel surface, the depletion will be insufficient, resulting in an excessively high surface peak electric field and poor breakdown stability; at the same time, there are usually Severe working environments such as surge currents can easily lead to thermal burnout of the device during the process of passing the avalanche current; in the case of high frequency, the power consumption of the device will increase significantly

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