Multiplication and accumulation circuit based on radix-4 coding and differential weight storage

Abstract

The invention discloses a multiplication and accumulation circuit based on radix-4 coding and differential weight storage. The circuit comprises an input data coding circuit, a differential weight storage circuit, an integral calculation circuit and a differential ADC circuit; the output end of the input data coding circuit is connected with the differential ADC circuit after sequentially passingthrough the differential weight storage circuit and the integral calculation circuit, and the differential ADC circuit outputs a multiplication and accumulation result; original input data is coded bythe input data coding circuit and then multiplied by a weight value stored in the differential weight storage circuit. The positive value and the negative value of each multiplication result are respectively accumulated through the integral calculation circuit, and then the difference of the positive value and the negative value is subjected to analog-to-digital conversion through the differenceADC circuit, so that the final multiplication and accumulation result is obtained. The multiplication and accumulation circuit has the advantages of being small in area, high in calculation speed, lowin power consumption and the like, can be used for neural form chips, and particularly can achieve large-scale parallel calculation in edge calculation equipment with high energy consumption requirements.

Description

technical field [0001] The invention relates to a resistive non-volatile memory circuit, in particular to a multiply-accumulate circuit based on radix-4 encoding and differential weight storage, which is used for the core computing circuit array of neuromorphic chips and belongs to neuromorphic circuits field. Background technique [0002] In recent years, artificial intelligence technology has developed rapidly, and various algorithms and applications are in a high-speed iterative process, which puts forward higher requirements for hardware storage capacity, computing power, and energy efficiency. The traditional computer adopts the Von Neumann structure. Due to the separation of the storage unit and the operation unit, when processing data, it needs to be read from the storage unit first, and then input into the processing unit for calculation. Since the storage unit uses a cache (SRAM)- The hierarchical structure of main memory (DRAM)-flash memory (FLASH), the communicat...

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Problems solved by technology

[0007] Aiming at the current problems of large multiplier area cost, high power consumption, low computing efficiency and difficulty in realizing large-scale parallel computing, the present invention provides a multiply-accumulate circuit based on radix-4 encoding and differential weight storage and a multiply-accumulate m

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