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RET IGBT with self-bias PMOS and manufacturing method thereof

A self-biasing, split gate technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of device breakdown voltage degradation, increase device switching loss, and reduce device switching speed.

Active Publication Date: 2019-11-26
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the charge storage layer can degrade the breakdown voltage of the device
In order to ensure that the breakdown voltage of the device will not degrade, the depth of the trench gate needs to be made relatively deep. However, a deep trench gate depth will increase the gate capacitance of the device, especially the Miller capacitance, and reduce the switching speed of the device. , increasing the switching loss of the device

Method used

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  • RET IGBT with self-bias PMOS and manufacturing method thereof
  • RET IGBT with self-bias PMOS and manufacturing method thereof
  • RET IGBT with self-bias PMOS and manufacturing method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0052] An embodiment of a RET IGBT device with self-biased PMOS, as figure 2 As shown, it includes: back collector metal 1, P-type collector region 2, N-type field stop layer 3 and N-drift region 4 stacked sequentially from bottom to top, with a trench gate structure above the N-drift region 4 , the trench structure includes a gate dielectric layer 6, a gate electrode 7, and a dielectric layer 10 above the gate dielectric layer 6 and the gate electrode 7; it is characterized in that: a P-type buried layer 12 is provided above the N-drift region 4, . A split gate structure, the split gate structure includes a polycrystalline split gate electrode 15, a gate dielectric layer 14; the top of the P-type buried layer 12 has an N-type charge storage layer 13; the top of the N-type charge storage layer 13 has a P type base region 5; the upper part of the P-type base region 5 has an N+ emitter region 8 and a P+ contact region 9; Metal 11; the gate electrode 7 is connected to the N-drif...

Embodiment 2

[0054] An embodiment of a RET IGBT device with self-biased PMOS, as image 3 As shown, it includes: back collector metal 1, P-type collector region 2, N-type field stop layer 3 and N-drift region 4 stacked sequentially from bottom to top, with a trench gate structure above the N-drift region 4 , the trench structure includes a gate dielectric layer 6, a gate electrode 7, a dielectric layer 10 above the gate dielectric layer 6 and the gate electrode 7; it is characterized in that there is a P-type buried layer 12 above the N-drift region 4, separating Gate structure, the separated gate structure includes a polycrystalline separated gate electrode 15, a gate dielectric layer 14; the upper part of the P-type buried layer 12 has an N-type charge storage layer 13; the upper part of the N-type charge storage layer 13 has a P-type base Region 5; the upper part of the P-type base region 5 has an N+ emitter region 8 and a P+ contact region 9; the upper part of the dielectric layer 10, ...

Embodiment 3

[0056] An embodiment of a RET IGBT device with self-biased PMOS, as Figure 4 As shown, on the basis of Embodiment 1, a super junction structure composed of super junction N pillars 41 and super junction P pillars 42 is introduced into the drift region, and the junction depth of the super junction P pillars 42 is less than or equal to the junction depth of the super junction N pillars 41. deep, a separate gate electrode 71 is introduced below the gate electrode 71 , and the separate gate electrode 71 is short-circuited with the separate gate electrode 15 .

[0057] The introduction of the super junction structure further reduces the turn-on voltage drop of the device and increases the breakdown voltage of the device, and the introduction of the separated gate electrode 71 further reduces the Miller capacitance of the device.

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Abstract

The invention belongs to the technical field of power semiconductor devices, and relates to a RET IGBT with a self-biased PMOS and a manufacturing method thereof. According to the RET IGBT with the self-biased PMOS and the manufacturing method thereof, a N-type charge storage layer is arranged between a P-type base region and a P-type buried layer, so that the influence of the N-type charge storage layer on the breakdown voltage of the device can be shielded while the forward conduction characteristic of the device is improved; by introducing a PMOS structure, an extra path is provided for theextraction of holes, the extraction speed of current carriers is accelerated, the switching speed of the device is improved, and the turn-off loss of the device is reduced; and meanwhile, an emitterembedded type separation gate structure can meet the requirement that a table top of the device is further narrowed to improve the forward conduction characteristic of the device, metal and contact holes of the emitter of the device can be easily and irregularly made, and meanwhile, the Miller capacitance of the device can be reduced further.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, and relates to an insulated gate bipolar transistor (RET IGBT) with a self-biased PMOS emitter embedded trench. [0002] technical background [0003] Insulated gate bipolar transistor (IGBT) is a new generation of power electronic devices because it combines the advantages of field effect transistor (MOSFET) and bipolar juncture transistor (BJT). It has the advantages of high speed, and it also has the advantages of large on-state current density, low conduction voltage, low loss and good stability of BJT. Therefore, it has developed into one of the core electronic components in modern power electronic circuits, and is widely used in various fields such as transportation, communication, household appliances and aerospace. The use of IGBT has greatly improved the performance of power electronic systems. [0004] For more than 30 years since the IGBT came out, how to reduce th...

Claims

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Application Information

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IPC IPC(8): H01L29/739H01L29/167H01L21/265H01L21/331H01L29/06
CPCH01L21/26513H01L29/0634H01L29/167H01L29/66348H01L29/7397
Inventor 张金平王康王鹏蛟刘竞秀李泽宏张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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