A three-terminal superlattice memory-computing integrated device with adjustable threshold voltage and its preparation method
A threshold voltage, superlattice technology, applied in the field of three-terminal superlattice storage and computing integrated device and its preparation, can solve the problem of limiting computer data processing speed, limited data line transmission signal rate, high energy consumption of central processing unit and memory And other issues
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[0058] This embodiment also provides a method for preparing the above-mentioned three-terminal superlattice memory-computing integrated device with adjustable threshold voltage, including the following steps:
[0059] S1: Provide a substrate layer, on which the lower electrode layer and the first inverse piezoelectric layer are sequentially deposited; the substrate layer includes a silicon wafer and a thermal growth layer deposited on the silicon wafer, and the lower electrode layer is sequentially deposited on the thermal growth layer , the first inverse piezoelectric layer;
[0060] S2: Open a first through hole, the first through hole penetrates through the first reverse piezoelectric layer and contacts the surface of the lower electrode layer, and fills the heating layer inside the first through hole; the shape of the first through hole is not limited, and its cross section can be It is a circle, a square or other regular polygons, and this embodiment is preferably a circl...
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