Duty cycle design method, system, medium and equipment for eliminating current sampling interference

A current sampling and design method technology, applied in the field of frequency conversion control, to achieve the effect of improving precision and accuracy, accurate sampling value, and stable output

Active Publication Date: 2020-09-22
RUKING EMERSON CLIMATE TECH SHANGHAI CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a duty cycle design method, system, medium and equipment for eliminating current sampling interference, which is used to solve the problem that the prior art cannot ensure system response speed and low hardware Under the condition of low cost, eliminate the problem of current sampling interference generated when PFC and frequency converter are used at the same time

Method used

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  • Duty cycle design method, system, medium and equipment for eliminating current sampling interference
  • Duty cycle design method, system, medium and equipment for eliminating current sampling interference
  • Duty cycle design method, system, medium and equipment for eliminating current sampling interference

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Embodiment 1

[0035] This embodiment provides a duty cycle design method for eliminating current sampling interference. The duty cycle design method for eliminating current sampling interference includes:

[0036] synchronously setting the power factor corrector and the clock signal of the frequency converter, so that the clock signals used by the power factor corrector and the frequency converter are the same;

[0037] Under the same clock signal, setting the switching frequency of the power factor corrector to a fixed multiple of the switching frequency of the frequency converter;

[0038] Setting the sampling time of the frequency converter according to the parity of the fixed multiple;

[0039] Comparing the relationship between the duty cycle time and the sampling time of the frequency converter, and phase-shifting the duty cycle of the power factor corrector according to the comparison result; the duty cycle time and the duty cycle of the power factor corrector are based on The switc...

Embodiment 2

[0063] This embodiment provides a duty cycle design system for eliminating current sampling interference. The duty cycle design system for eliminating current sampling interference includes:

[0064] A clock synchronization module, configured to synchronize the clock signals of the power factor corrector and the frequency converter, so that the clock signals used by the power factor corrector and the frequency converter are the same;

[0065]A period setting module, configured to set the switching frequency of the power factor corrector to a fixed multiple of the switching frequency of the frequency converter under the same clock signal;

[0066] The sampling time setting module is used to set the sampling time of the frequency converter according to the parity of the fixed multiple;

[0067] a phase shifting module, used to compare the relationship between the duty cycle time and the sampling time of the frequency converter, and shift the phase of the power factor corrector d...

Embodiment 3

[0081] This embodiment provides a device, including: a processor, a memory, a transceiver, a communication interface or / and a system bus; the memory and the communication interface are connected to the processor and the transceiver through the system bus and complete mutual communication, and the memory is used for The computer program is stored, the communication interface is used to communicate with other devices, the processor and the transceiver are used to run the computer program, so that the device executes each step of the duty cycle design method for eliminating current sampling interference.

[0082] Specifically, the device includes: a processor, a memory, a transceiver, a communication interface or / and a system bus; the memory and the communication interface are connected to the processor and the transceiver through the system bus and complete mutual communication, and the memory is used to store the The program, the communication interface are used to communicate w...

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Abstract

The present invention provides a duty cycle design method, system, medium and equipment for eliminating current sampling interference. The duty cycle design method for eliminating current sampling interference includes: synchronously setting the power factor corrector and the clock signal of the frequency converter , so that the clock signal used by the power factor corrector and the frequency converter is the same; under the same clock signal, the switching frequency of the power factor corrector is set to the fixed frequency of the switching frequency of the frequency converter multiple; set the sampling time of the frequency converter according to the parity of the fixed multiple; compare the relationship between the duty cycle time and the sampling time of the frequency converter, and phase-shift the duty cycle of the power factor corrector according to the comparison result ; the duty cycle time and the power factor corrector duty cycle are determined according to the switching period of the power factor corrector. The invention solves the problem of current sampling interference generated when the PFC and the frequency converter are used simultaneously by providing a control method of the PFC duty cycle.

Description

technical field [0001] The invention belongs to the field of frequency conversion control and relates to a duty cycle design method, in particular to a duty cycle design method, system, medium and equipment for eliminating current sampling interference. Background technique [0002] At present, frequency conversion technology is widely used in motor control. In the case of being connected to the power grid, an active PFC (PowerFactor Correction, power factor corrector) is required to reduce harmonic interference to the power grid. In PFC and inverter design, current sampling is a key factor related to control performance and reliability. [0003] Active power correction and frequency conversion techniques are generally implemented based on pulse width modulation (PWM). Due to the use of switching devices, glitches are generated at both turn-on and turn-off moments. For the step-up PFC, the current sampling will be performed at the middle moment when the switching tube is t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02M1/00H02M1/42
CPCH02M1/00H02M1/42H02M1/0009Y02B70/10
Inventor 林石裕张璇璇颜道丹
Owner RUKING EMERSON CLIMATE TECH SHANGHAI CO LTD
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