Bit line screening method, device, storage device and storage medium
A screening method and bit line technology, applied in static memory, instruments, etc., can solve problems such as difficult detection and achieve accurate detection effect
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Embodiment 1
[0043] figure 1 This is a flowchart of a bit line screening method provided in Embodiment 1 of the present invention. The method in this embodiment can be performed by a bit line screening device, which can be implemented in hardware and / or software, and can generally be integrated in the storage device. The method of this embodiment specifically includes:
[0044] S101, respectively applying a first detection voltage and a second detection voltage for a set time to all the bit lines in each of the to-be-detected regions that are independent of each other by applying the same voltage at intervals, and simultaneously apply the same voltage to all the bit lines in each of the to-be-detected regions respectively. All word lines are applied with cut-off voltages for a set time, wherein the voltage difference between the first detection voltage and the second detection voltage is greater than the set voltage difference.
[0045] In this embodiment, the to-be-detected area may spe...
Embodiment 2
[0059] figure 2 This is a flowchart of a bit line screening method provided by the second embodiment of the present invention. This embodiment is optimized on the basis of the above-mentioned embodiment. In this embodiment, a specific source voltage application method is provided, and it is determined whether to discard the to-be-detected area according to the number of defective bit lines included, and the number of defective bit lines is increased. Embodiments of substitution of lines and substitution steps of discarding areas to be inspected.
[0060] Correspondingly, the method of this embodiment specifically includes:
[0061] S201, respectively applying a first detection voltage and a second detection voltage for a set time to all the bit lines in each of the regions to be detected that are independent of each other by applying the same voltage at intervals, and simultaneously apply the same voltage to all the bit lines in each region to be detected that are independen...
Embodiment 3
[0082] image 3 It is a structural diagram of a bit line screening device provided in Embodiment 3 of the present invention. like image 3 As shown, the device includes: a voltage application module 301, a programming module 302, a verification module 303 and a failed bit line determination module 304, wherein:
[0083] The voltage applying module 301 is used to respectively apply the first detection voltage and the second detection voltage for a set time to all the bit lines in each of the independent regions to be detected by applying the same voltage at intervals. All word lines in the to-be-detected area are applied with a cut-off voltage for a set time, wherein the voltage difference between the first detection voltage and the second detection voltage is greater than the set voltage difference;
[0084] The programming module 302 is used to perform a verification programming operation on each to-be-detected area respectively, so that the data stored by any two adjacent ...
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