Method and circuit for credible design of integrated circuit design process

An integrated circuit and circuit technology, applied in CAD circuit design, computer aided design, calculation, etc., can solve the problems that analog circuits are susceptible to process deviation, high monitor circuit scale and complexity, and affect measurement results, etc., to achieve Reduce the difficulty of testing, reduce the impact, and ensure the effect of accurate measurement

Active Publication Date: 2020-04-17
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the existing monitors for current detection are generally composed of analog circuits, which require the addition of an analog-to-digital converter. At the same time, most of the existing Trojan horse detection methods need to model the Trojan horse, resulting in an excessive monitor circuit. The scale and complexity make the circuit not easy to integrate; in addition, the analog circuit is also more susceptible to process variation, which in turn affects the measurement results

Method used

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  • Method and circuit for credible design of integrated circuit design process
  • Method and circuit for credible design of integrated circuit design process
  • Method and circuit for credible design of integrated circuit design process

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Embodiment 1

[0063] See figure 1 , figure 1 It is a flow chart of a method for trusted design of integrated circuit design process provided by an embodiment of the present invention, including:

[0064] Step 1: Obtain the gate-level netlist of the integrated circuit; wherein, the gate-level netlist of the integrated circuit includes process deviation information.

[0065] In this embodiment, said obtaining the gate-level netlist of the integrated circuit includes:

[0066] Read the lib file in the process library to obtain the first lib process library file;

[0067] Import process deviation to the first lib process library file to obtain the second lib process library file;

[0068] Compiling the second lib process library file to obtain a db process library file;

[0069] Constrain the db process library file and the integrated circuit to obtain gate-level netlists of multiple integrated circuits and timing constraint files corresponding to the gate-level netlists.

[0070] Specifical...

Embodiment 2

[0113] Another embodiment of the present invention also provides a circuit for trusted design of integrated circuit design process, please refer to Figure 4 , Figure 4 It is a block diagram of a circuit structure used in the credible design of the integrated circuit design process provided by the embodiment of the present invention, including:

[0114] A mode selection module 1, configured to configure the integrated circuit into several ring oscillators and output several oscillating signals;

[0115] A signal selection module 2, connected to the mode selection module 1, for selecting and outputting one of the plurality of oscillating signals;

[0116] The detection module 3 is connected to the signal selection module 2 and used for frequency detection of the oscillation signal.

[0117] In this embodiment, the mode selection module 1 includes a two-to-one data selector, which is set at the input end of the path to be tested in the integrated circuit, which enables the pa...

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Abstract

The invention discloses a method and a circuit for credible design of an integrated circuit design process. The method comprises the following steps: acquiring a gate-level netlist of an integrated circuit; wherein the integrated circuit gate-level netlist comprises process deviation information; acquiring a to-be-tested path in the integrated circuit; configuring the to-be-measured path into a ring oscillator; adding a gate-level netlist of an on-chip detection circuit in the gate-level netlist of the integrated circuit to complete the layout design of a new circuit; performing first dynamicsimulation on the new circuit to obtain a frequency threshold range of the ring oscillator; and performing credible design verification on the new circuit by utilizing the detection circuit accordingto the frequency threshold range. According to the credible design method provided by the invention, the influence of the Trojan horse on the side channel information is directly reflected on the pathdelay, so that the process of modeling the Trojan horse is omitted, and the test difficulty is reduced; and meanwhile, the detection circuit is simple in structure and easy to integrate into an integrated circuit design process, so that the measurement accuracy is ensured.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a method and circuit for credible design of an integrated circuit design process. Background technique [0002] In recent years, hardware manufacturers have widely used the business model of manufacturing equipment outsourcing and third-party intellectual property core (3PIP) procurement. However it results in highly complex supply chains involving thousands of people, as well as complex automated design and manufacturing equipment. In this mode, hardware attackers can more easily carry out attacks at different nodes in the supply chain. This breach of supply chain security can lead to malicious modification of integrated circuits (ICs), known as hardware Trojan horses (HTH). Hardware Trojans are stealthy in nature, designed to evade design verification and post-manufacturing testing. Activation of a hardware Trojan can cause catastrophic damage to the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/38G06F30/3312G06F115/12
Inventor 史江义李鹏飞赵博马佩军郭海张华春孟坤吴秋纬
Owner XIDIAN UNIV
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