True random number generation method and true random number generator
A true random number and generator technology, applied in random number generators, electrical digital data processing, digital data processing components, etc., can solve the problems of large circuit area and resource consumption, and achieve the effect of wide application prospects
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Embodiment 1
[0040] Such as figure 2 As shown, therefore, the present invention provides a kind of true random number generation method, comprises the steps:
[0041] S1 selects high-frequency clocks and low-frequency clocks from different sources as random sources; high-frequency clocks and low-frequency clocks can be generated in a variety of ways, such as:
[0042] As a preferred embodiment, two on-chip RC oscillators can be used as clock sources, one of which is a high-frequency clock, such as 32M, 28M, etc. commonly used in MCU; the other is a clock used in a low-power state, generally for 32K, 12K, etc.
[0043] As a preferred embodiment, if the external crystal oscillator output is the source of the clock, the external crystal oscillator directly inputs high-frequency clocks, such as 16M, 27M, 32M, etc., or low-frequency 32.768K, 12K, etc.
[0044] As a preferred embodiment, an external crystal can be used together with the internal circuit of the chip to form an oscillation circ...
Embodiment 2
[0060] A true random number generator consisting of
[0061] A high-frequency clock selection unit is used to obtain high-frequency clocks from different sources; as a preferred embodiment, the high-frequency clocks include but are not limited to on-chip oscillators, external clocks, external clock frequency multipliers, external crystals plus internal Oscillating circuit frequency multiplication, external crystal plus internal oscillation circuit oscillator frequency multiplication method is obtained.
[0062] The high-frequency clock tap unit is used to tap the tap module of the high-frequency clock multiple times; specifically, the tap module includes but is not limited to an arithmetic logic unit, a storage controller, an SPI interface, DES encryption, an interrupt processor, timer.
[0063] The XOR unit is used to perform XOR processing on the high-frequency clocks tapped separately;
[0064] The low-frequency clock selection unit is used to obtain low-frequency clocks ...
Embodiment 3
[0074] The generation equation of the selected cyclic code is: [g0 g1 g2 g3 g4 g5 g6 g7 g8 g9 g10]=[1 0 0 11 0 1 1 1 0 1] The circuit is as follows Figure 4 shown. The circuit structure is realized by a shift register composed of D flip-flops and an exclusive OR gate. The random signal sequence is input bit by bit into the shift register chain composed of 11 D flip-flops. The post-processing module taps the data at the corresponding position with a coefficient of 1 in the D flip-flop chain according to the generation equation and performs an XOR operation, and the obtained result qn is sent to the output register, and then output in parallel after the output register is filled. . According to the generation equation, the outputs of the first, fourth, fifth, seventh, eighth, ninth, and eleventh-level D flip-flops are XORed to generate post-processing output data.
[0075] A true random number generation method and a true random number generator of the present invention are ...
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