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Method for forming aluminum pad structure and device including aluminum pad structure

A technology of aluminum pads and devices, which is applied in the manufacture of semiconductor devices, electrical solid devices, semiconductor/solid devices, etc., can solve the problems of high manufacturing cost and complicated process, and achieve the effect of reducing complexity and manufacturing cost

Active Publication Date: 2021-08-24
HUA HONG SEMICON WUXI LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The present application provides a method for forming an aluminum pad structure and a device containing the aluminum pad structure, which can solve the problems of the formation method of the aluminum pad structure provided in the related art with relatively complicated processes and high manufacturing costs

Method used

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  • Method for forming aluminum pad structure and device including aluminum pad structure
  • Method for forming aluminum pad structure and device including aluminum pad structure
  • Method for forming aluminum pad structure and device including aluminum pad structure

Examples

Experimental program
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Embodiment 1

[0063] Reference Figure 6 , Which illustrates a flowchart of a method for forming an aluminum pad structure of the present application provides one exemplary embodiment, the method comprising:

[0064] Step 601, forming an aluminum metal layer on the first dielectric layer, a first dielectric layer formed in a first metal interconnect layer and the second layer metallic interconnect, a first layer of metal interconnecting lines in the second intermetallic layer below the connection, a contact hole is formed between the first layer and the second metal interconnect layer metallic interconnect.

[0065] Reference Figure 7 Which shows a schematic view of an aluminum metal layer 720 formed on the first dielectric layer 710. like Figure 7 , A first dielectric layer 710 formed in a first metal interconnect layer 7111, and a second layer of metal interconnecting lines 7121,7122, 7111 of the first metallic interconnect layer in the second layer metallic interconnect 7121, below 7122, a fi...

Embodiment 2

[0083] In this embodiment, the passivation layer 730 includes, in order from the bottom layer and the upper silicon nitride layer, an intermediate silicon nitride layer and a top silicon dioxide layer. Difference between Reference Example 1, Example 2 and Example 1 in that:

[0084] Step 603 'is formed on the first dielectric layer, a second layer metallic interconnect other layer of aluminum metal and passivation layer "includes but is not limited to: by a CVD process on the first dielectric layer, a second layer metallic interconnect other and the underlying silicon nitride layer on the aluminum metal layer is deposited; deposited by a CVD process on the underlying silicon dioxide layer intermediate silicon nitride layer; depositing a top layer of silicon nitride by a CVD process on the intermediate layer is a silica layer.

Embodiment 3

[0086] In this embodiment, the second dielectric layer comprises, in order from the bottom layer and the upper silicon dioxide layer, a titanium nitride layer and a top silicon dioxide layer. Reference Example 2, Example 3 and Example 2 is that the difference between:

[0087] Step 604 'forming a second dielectric layer on the passivation layer "includes but is not limited to: silicon dioxide underlayer is deposited by a CVD process on the top layer of the silicon nitride layer; depositing titanium nitride by a CVD process on the underlying silicon dioxide layer layer; top silicon dioxide layer is deposited by a CVD process on the titanium nitride layer.

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Abstract

The present application discloses a method for forming an aluminum pad structure and a device containing the aluminum pad structure, including: forming an aluminum metal layer on the first dielectric layer; etching and removing other metal layers except the area above the target metal interconnection line by photolithography. The aluminum metal layer in the area exposes the first dielectric layer and other second-level metal interconnection lines in other areas; a passivation layer is formed on the first dielectric layer, other second-level metal interconnection lines and the aluminum metal layer; forming a second dielectric layer on the passivation layer; coating a photoresist layer on the second dielectric layer; etching the photoresist layer to expose the second dielectric layer above the aluminum metal layer; etching the second dielectric layer , so that the passivation layer above the aluminum metal layer is exposed; the passivation layer and the remaining photoresist layer are etched to remove the remaining photoresist layer, and the remaining passivation layer forms a cylindrical shape around the opening of the aluminum metal layer Spacer structure. The method provided in this embodiment includes only one photolithography process for etching, which reduces the complexity of the manufacturing process.

Description

Technical field [0001] TECHNICAL FIELD The present application relates to manufacturing, particularly relates to a method of forming an aluminum pad structure, and a device having the pad structure aluminum. Background technique [0002] In the manufacturing of integrated circuits, chips typically need to produce aluminum spacer (hereinafter referred to as "aluminum mats") structure for testing solder joints and the end of the chip package pin connected to a rear end of the probe card testing. Thus aluminum pad structure for signal transfer and the use of test chips plays an important role. [0003] Figure 1 to 5 Shows a method of forming an aluminum pad structure of the related art provided, comprising: [0004] Step S1, such as Figure 1 , The first dielectric layer 110 is formed with a first layer metallic interconnect 111 and the second layer metallic interconnect 121 and 122, between the first layer metallic interconnect 111 and the second layer metallic interconnect 122 a c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/48H01L21/48
CPCH01L21/4814H01L23/48H01L23/4827H01L2224/05
Inventor 郭振强陈广龙
Owner HUA HONG SEMICON WUXI LTD