Array substrate, preparation method thereof and display panel
A technology for array substrates and substrates, which is applied in semiconductor/solid-state device manufacturing, electrical components, transistors, etc., and can solve problems affecting the performance of thin-film transistors, etc.
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Embodiment 1
[0031] Such as Figure 1 to Figure 4 As shown, this embodiment provides an array substrate, including a substrate 1, a thin film transistor located on the substrate 1, an insulating layer 3, and a barrier 6, the gate layer 2 of the thin film transistor is located on the substrate 1, and the insulating layer 3 Located on the side of the gate layer 2 away from the substrate 1, and the insulating layer 3 covers the gate layer 2, the source drain 5 and the active layer 4 of the thin film transistor are located on the side of the insulating layer 3 away from the substrate 1, and the source At least part of the drain 5 is connected to the active layer 4, and the active layer 4 coincides with the projection of at least part of the gate layer 2 on the substrate 1,
[0032] Wherein, the insulating layer 3 has a through hole 31, the through hole 3 1 with gate layer 2 The projections on the substrate 1 do not overlap, the blocking portion 6 is located in the through hole 31, and the bl...
Embodiment 2
[0055] Such as Figure 1 to Figure 4 As shown, this embodiment provides a method for preparing a base array plate, which is used to form the array substrate in Example 1. The preparation method includes:
[0056] S11 , forming the gate layer 2 of the thin film transistor on the substrate 1 .
[0057] S12 , forming an insulating layer 3 on a side of the gate layer 2 away from the substrate 1 , and the insulating layer 3 has a through hole 31 .
[0058] Specifically, first, a deposition process is used to form an insulating material layer on the side of the gate layer 2 away from the substrate 1 , and then a patterning process (such as a photolithography process, etc.) is used to form the through hole 31 .
[0059] S13. Form the source and drain electrodes 5 and the active layer 4 of the thin film transistor on the side of the insulating layer 3 far away from the substrate 1, and form a blocking portion 6 in the through hole 31 of the insulating layer 3, wherein the blocking po...
Embodiment 3
[0071] This embodiment provides a display panel, including:
[0072] The array substrate in embodiment 1;
[0073] The backlight module is located on the side of the substrate 1 away from the insulating layer 3 .
[0074] Wherein, that is to say, the backlight module is used to provide a light source to the array substrate, so that the pixel units of the array substrate emit light to form a display image.
[0075] However, in the array substrate of this embodiment, the blocking portion 6 is provided in the through hole 31 of the insulating layer 3, which can further prevent the light under the substrate 1 from reaching the source and drain electrodes 5, thereby preventing the light directed to the source and drain electrodes 5 from entering the grid. The reflection between the electrode layer 2 and the source and drain electrodes 5 is reflected onto the active layer 4, thereby further ensuring the electrical performance of the thin film transistor.
[0076] Specifically, the...
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