Manufacturing method of semiconductor device and semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device and the semiconductor device. The method comprises the steps of providing a semiconductor substrate, wherein the semiconductor substrate is provided with a dielectric layer, the dielectric layer comprises an etching area and a reserved area, and the reserved area is an area used as a mask for etching the semiconductor substrate after the etching area is removed; forming patterned core layers and a side wall layer covering the dielectric layer and the core layers on the dielectric layer, wherein a groove is formed in the side wall layer between every two adjacent core layers; performing a patterning process on the side wall layer to remove the side wall layer located on the top surface of the core layer and at the bottom of the groove in the etching area so as to expose a first part of the etching area; forming a dielectric barrier layer covering the first part, wherein the top of the dielectric barrier layer is flush with the core layers; and removing the core layers and the dielectric barrier layer to expose the etching area. According to the invention, the performance and yield of the device are improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a semiconductor device and the semiconductor device. Background technique [0002] With the continuous reduction of semiconductor process nodes, the difficulty of semiconductor manufacturing is increasing day by day. Ordinary photolithography-etching technology has been unable to meet the needs of semiconductor manufacturing. The multi-patterning technology has become one of the popular technologies in the industry. The multi-patterning technology is modified based on the existing photolithography process, and the minimum pitch (pitch) between adjacent semiconductor patterns is improved. [0003] Based on the double imaging technology of lithography-etching-re-lithography-re-etching (LELE DP), two lithography and two etching are completed on the same photoresist, which is prone to misalignment of adjacent patterns on the mask. And cause pitc...

AI Technical Summary

Problems solved by technology

However, in the existing process, the sidewall-assisted self-aligned double patterning process often occurs that the etching process of the core layer and its sidewall pattern used as the basis of the subsequent process is difficult to control, making it difficult to control the etching process used to etch the semiconductor substrate. The loss of the dielectric layer of the mask is serious, which affects the subsequent etching process of the semiconductor substrate

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