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A deep silicon via etching method

A technology of through-hole etching and deep silicon, applied in the field of plasma processing, can solve the problems of disconnection, cavity, waste, etc.

Active Publication Date: 2017-01-25
ADVANCED MICRO FAB EQUIP INC CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Such an opening structure is not conducive to the deposition of conductive materials in the next step. The smaller opening sidewalls above will block the further deposition of conductive materials in the holes below. It is likely that after the hole is filled with conductive materials, there will still be cavities in the holes.
The existence of these cavities will not only deteriorate the conductive characteristics, but even cause disconnection of the lines that need to be conducted.
This unfavorable sidewall morphology cannot be eliminated by adjusting the adjustable parameters in the traditional Bosch etching method
This causes the holes formed by the traditional Bosch etching method to cause problems in subsequent processing, and eventually leads to the abandonment of the entire product, resulting in a lot of waste and loss

Method used

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  • A deep silicon via etching method
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  • A deep silicon via etching method

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Embodiment Construction

[0013] The present invention will be described in detail below through preferred specific embodiments with reference to FIG. 1 to FIG. 2 .

[0014] The inventors have found that the main reason for the through holes with curved side walls when using the traditional Bosch etching method is that the depth of the through holes etched in the application of TSV is very large, generally greater than 30um and often greater than 100um, so After the etching reaches a certain depth, it is difficult for the by-products of the reaction such as SiF4 to diffuse upward through the through holes formed by etching, so they cannot be sucked away by the gas extraction device below the reaction chamber. The failure of the reaction by-products to be discharged will cause the new reaction gases SF6 and C4F8 to fail to reach the reaction area in expected quantities. For example, when the etching depth exceeds 1 / 3 of the predetermined depth of the entire through hole, C4F8 is first affected by the re...

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Abstract

The invention provides a through-silicon-via (TSV) etching method. A silicon wafer to be processed is arranged in a plasma processing chamber, the surface of the silicon wafer includes a graphical mask layer, the steps of etching and deposition are carried out circularly and alternatively until a through via with a target depth is formed, etching gas is led into a reaction chamber in the step of etching to etch a silicon substrate, openings are formed, and fluorocarbon gas is led in the step of deposition to protect the lateral walls of the openings formed in the step of etching. The TSV etching method is characterized in that the step of gas exhaust is included between the step of etching and the step of deposition, and leading-in of the etching gas or deposition gas is stopped in the step of gas exhaust. By means of the TSV etching method, arc lateral walls of the etched through via are prevented from being generated.

Description

technical field [0001] The invention relates to the field of plasma processing, in particular to a deep hole silicon etching method to obtain better sidewall morphology. Background technique [0002] In the field of semiconductor manufacturing technology, in the fields of MEMS (Micro-Electro-Mechanical Systems, micro-electro-mechanical systems) and 3D packaging technology, it is usually necessary to etch deep via holes in materials such as silicon. For example, in crystalline silicon etching technology, deep through-silicon vias (Through-Silicon-Via, TSV) have a depth of hundreds of microns, and their aspect ratio is even much greater than 30, and are usually etched by deep reactive ion etching. Bulk silicon is formed. Said silicon material is mainly monocrystalline silicon. After the etching is completed, conductive materials such as copper are filled into the holes or grooves formed by etching. The filling method can be chemical vapor deposition (CVD) or physical vapor d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768B81C1/00
CPCB81C1/00619B81C2201/0112H01L21/3065H01L21/30655
Inventor 严利均黄秋平许颂临
Owner ADVANCED MICRO FAB EQUIP INC CHINA
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