Manufacturing method of semiconductor device

Abstract

The invention provides a manufacturing method of semiconductor devices. A second metal hard masking layer with a first opening is formed on the upper part of a first metal hard masking layer, the maincomposition of the second metal hard masking layer is metal oxide, the problems of shape deviation, opening collapse, a great deal of polymer residue in an opening and the like when a pattern of thefirst opening of a photoresist layer transfers directly to the first metal hard masking layer are solved, and the second metal hard masking layer with the first opening can improve the side wall shapeof the formed target opening, and is easy to remove when being used as a mask to etch a corresponding overlapped layer on the lower part to form a target opening, so that generation of etching residue in the target opening is reduced; and a diblock copolymer layer is further formed in a patterned photolithography layer on the upper part of the second metal hard masking layer through a self-assembly process, and a first block and a second block which are insoluble in the block copolymer layer are used for reducing the line width of an optical masking pattern.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a method for manufacturing a semiconductor device. Background technique [0002] The manufacturing process of integrated circuits involves processes such as photolithography, etching, and thin film deposition. At least one opening (including trenches, via holes, contact windows, etc.) can be etched in the target etching layer by photolithography and etching processes, so as to form target structures, such as gate lines, bit lines, memory cells and metal interconnect structures. At present, when forming openings with different pattern feature sizes (Critical dimension, CD) in the target etching layer, metal or metal compound is usually first formed on the target etching layer as a metal hard mask layer (Metal Hard Mask, MHM) , to obtain all or part of the opening pattern with a smaller critical dimension, for example, using a titanium nitride (TiN) metal...

AI Technical Summary

Problems solved by technology

[0003] However, with the development of integrated circuit manufacturing to 28nm and below, the feature size (CD) of the pattern and the pitch between the patterns are continuously shrinking, and the feature size of the lithography is close to the limit resolution of the exposure machine. There are some very serious problems in the forming method, such as the difficulty in controlling the contour of the sidewall of the opening, the phenomenon of cavities or striations, and the narrow process window (Process Window), etc., which affect the reliability and yield of the process, and cannot meet the requirements Fabrication of Semiconductor Devices with Smaller Pattern Feature Sizes

Images