Relay protection system and special multi-core Soc chip architecture thereof

Abstract

The embodiment of the invention relates to a relay protection system and a special multi-core Soc chip architecture thereof. The special multi-core Soc chip architecture comprises a first dual-channelDDR, a second dual-channel DDR, a management processing core, a communication data processing core, a protection locking processing core, a protection logic processing core, a first secondary cache and a second secondary cache which are integrated on a chip. According to the special multi-core Soc chip architecture for the relay protection system, the four processing cores, the first dual-channelDDR, the second dual-channel DDR, the first secondary cache and the second secondary cache are integrally arranged on the chip, so that the original complex multi-chip hardware architecture is simplified; and low operation reliability and stability of the relay protection system caused by unstable connection of a multi-chip hardware structure are also avoided, and the operation reliability and stability of the relay protection system are improved. The technical problem that the operation stability and reliability of a relay protection product are influenced due to the fact that an existing relay protection multi-chip framework adopts a framework that a plurality of chips adopt a plurality of clamping plates and the multi-chip framework is complex is solved.

Description

technical field [0001] The invention relates to the technical field of electric power system relay protection, in particular to a relay protection system and a dedicated multi-core Soc chip architecture. Background technique [0002] At present, it has been popularized and applied in the power system, and the corresponding intelligent and digital technology is becoming more and more mature. It is also in the field of relay protection of the power system. At present, the relay protection of the power system has intelligent and digital relay protection. [0003] The products on the market that support intelligent and digital relay protection devices are all implemented with a multi-chip architecture. The existing multi-chip architecture for relay protection uses multiple chips and multiple card boards. The multi-chip architecture is complex, which affects the successor. The operation stability and reliability of the electrical protection product, and the complex system structu...

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Problems solved by technology

[0005] The embodiment of the present invention provides a relay protection system and its dedicated multi-core Soc chip architecture, which is used to solve the problem that the multi-chip architecture of the existing relay protection adopts the architecture of multiple chips and multiple card boards, and the multi-chip architecture is complex , thus affecting the technical problems of the operation stability and reliability of relay protection products

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