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Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers

A barrier layer, metal technology, applied in circuits, electrical components, semiconductor/solid-state device components, etc., can solve problems such as weak interface adhesion

Active Publication Date: 2020-08-21
TESSERA INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the use of cobalt and ruthenium barrier / liner layers for copper interconnects can be problematic because such materials do not provide a level of adhesion to the dielectric material of the ILD layer that is as strong as conventional TaN or TiN barrier layers, and Therefore the interfacial adhesion between the cobalt or ruthenium liner layer and the dielectric material of the ILD layer is weak

Method used

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  • Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers
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  • Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers

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Embodiment Construction

[0024] Embodiments of the present invention will now be described in more detail with respect to methods for fabricating low-resistivity metal interconnect structures having self-forming diffusion barriers and semiconductor devices comprising low-resistivity metal interconnect structures having self-forming diffusion barriers Program. It should be understood that the various layers, structures and regions shown in the drawings are schematic diagrams that are not drawn to scale. Additionally, for ease of illustration, one or more types of layers, structures, and regions that are commonly used to form semiconductor devices or structures may not be explicitly shown in a given figure. This does not imply that any layers, structures and regions not explicitly shown are omitted from the actual semiconductor structure. Furthermore, it is to be understood that the embodiments of the invention discussed herein are not limited to the specific materials, features, and process steps show...

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Abstract

Methods for fabricating low-resistivity metallic interconnect structures with self-forming diffusion barrier layers are provided, as well as semiconductor devices comprising low-resistivity metallic interconnect structures with self-formed diffusion barrier layers. For example, a semiconductor device includes a dielectric layer disposed on a substrate, an opening etched in the dielectric layer, ametallic liner layer covering sidewall and bottom surfaces of the opening in the dielectric layer, a copper material filling the opening to form an interconnect structure, and a self-formed diffusionbarrier layer formed in the sidewall surfaces of the opening of the dielectric layer. The self-formed diffusion barrier layer includes manganese atoms which are diffused into the sidewall surfaces ofthe dielectric layer.

Description

technical field [0001] The present invention relates generally to semiconductor fabrication techniques, and in particular, to techniques for fabricating metal interconnect structures. Background technique [0002] Semiconductor integrated circuit chips are typically fabricated with back-end-of-line (BEOL) interconnect structures that include multiple layers of metal lines and interlayer metal vias to connect portions that are front-end-of-line (FEOL) layers of the semiconductor integrated circuit chip Manufactured various integrated circuit components and devices. The current state of the art EOL process technology typically implements copper to form BEOL interconnects, since the use of copper material is known to significantly reduce electrical resistance in BEOL interconnect structures, resulting in improved conductivity and higher performance. However, as the copper interconnect structure is scaled down, the electrical resistivity and current density within the copper in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
CPCH01L21/76816H01L21/76831H01L21/76879H01L23/481H01L23/53295H01L23/5226H01L23/53238H01L21/76846H01L21/76865H01L21/76867H01L21/7684H01L21/76858H01L21/76802H01L21/76843H01L21/76873
Inventor H·P·阿曼亚普C·B·皮萨拉R·R·帕特洛拉杨智超T·诺加米
Owner TESSERA INC