Check patentability & draft patents in minutes with Patsnap Eureka AI!

Three-dimensional stacking alignment method

A three-dimensional stacking and chip technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as overlay error, chip transmission error, optical marking point error, etc., to avoid error problems and increase accuracy. Effect

Pending Publication Date: 2020-09-11
浙江集迈科微电子有限公司
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this whole process, the position of mark production is often not completed in one operation with the final welding, so there are errors in overlaying, and there are also errors in the optical marking point, and there are also errors in the transmission of upper and lower chips in terms of track propulsion. For more and more high-precision modules in the future, these errors may lead to product stacking errors, or reduce the reliability of the module

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Three-dimensional stacking alignment method
  • Three-dimensional stacking alignment method
  • Three-dimensional stacking alignment method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0027] Such as Figure 1 to Figure 4 As shown, a three-dimensional stacking alignment method specifically includes the following steps:

[0028] 101) Basic chip 2 installation steps: place basic chip 2 on the surface of L-shaped base 1, and set an automatic suction device for fixing basic chip 2 at the bottom of base 1; Initial alignment on the side.

[0029] Scan the X-ray lens to the positioning point of the basic chip 2, and after the position is reset to zero, input the azimuth coordinates of the lines to be bonded, and move the X-ray lens to the lines to be bonded. Complete the positioning of the basic chip 2 and prepare for subsequent calibration.

[0030] Among them, the thickness range of the base 1 is between 200um and 2000um, and the material includes inorganic materials such as silicon, glass, quartz, silicon carbide, aluminum oxide, etc., or organic materials such as epoxy resin and polyurethane, and its main function is to provide support. .

[0031] 102) The ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a three-dimensional stacking alignment method. The method specifically comprises the following steps: 101) a basic chip placement step, 102) a stacked chip positioning step and103) a bonding step. The provided three-dimensional stacking alignment method can avoid errors in a chip bonding process.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and more specifically, it relates to a three-dimensional stacking alignment method. Background technique [0002] Microwave and millimeter wave radio frequency integrated circuit technology is the foundation of modern national defense weaponry and Internet industry. Millimeter-wave radio frequency integrated circuits also have huge actual needs and potential markets. [0003] However, for high-frequency microsystems, the area of ​​the antenna array is getting smaller and smaller, and the distance between the antennas must be kept within a certain range so that the entire module can have excellent communication capabilities. However, for analog device chips such as radio frequency chips, the area cannot be reduced exponentially like digital chips. In this way, there will be no enough area for ultra-high frequency radio frequency microsystems to place PA / LNA at the same time. LNAs ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/02H01L21/67H01L21/68
CPCH01L21/681H01L21/67098H01L21/67259H01L21/02
Inventor 冯光建
Owner 浙江集迈科微电子有限公司
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com